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LTC2208-14 Datasheet(PDF) 6 Page - Linear Technology

Part # LTC2208-14
Description  14-Bit, 130Msps ADC
Download  28 Pages
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Manufacturer  LINER [Linear Technology]
Direct Link  http://www.linear.com
Logo LINER - Linear Technology

LTC2208-14 Datasheet(HTML) 6 Page - Linear Technology

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LTC2208-14
6
220814f
POWER REQUIRE E TS The denotes the specifications which apply over the full operating temperature
range, otherwise specifications are at TA = 25°C. AIN = –1dBFS. (Note 4)
TI I G CHARACTERISTICS The denotes the specifications which apply over the full operating temperature
range, otherwise specifications are at TA = 25°C. (Note 4)
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
VDD
Analog Supply Voltage
(Note 8)
3.135
3.3
3.465
V
PSHDN
Shutdown Power
SHDN = VDD
0.2
mW
STANDARD LVDS OUTPUT MODE
OVDD
Output Supply Voltage
(Note 8)
3
3.3
3.6
V
IVDD
Analog Supply Current
401
470
mA
IOVDD
Output Supply Current
71
90
mA
PDIS
Power Dissipation
1498
1782
mW
LOW POWER LVDS OUTPUT MODE
OVDD
Output Supply Voltage
(Note 8)
3
3.3
3.6
V
IVDD
Analog Supply Current
401
470
mA
IOVDD
Output Supply Current
40
50
mA
PDIS
Power Dissipation
1356
1650
mW
CMOS OUTPUT MODE
OVDD
Output Supply Voltage
(Note 8)
0.5
3.6
V
IVDD
Analog Supply Current
401
470
mA
PDIS
Power Dissipation
1320
1551
mW
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
fS
Sampling Frequency
(Note 8)
1
130
MHz
tL
ENC Low Time
Duty Cycle Stabilizer Off (Note 7)
3.65
3.846
1000
ns
Duty Cycle Stabilizer On (Note 7)
2.6
3.846
1000
ns
tH
ENC High Time
Duty Cycle Stabilizer Off (Note 7)
3.65
3.846
1000
ns
Duty Cycle Stabilizer On (Note 7)
2.6
3.846
1000
ns
tAP
Sample-and-Hold Aperture Delay
–1
ns
LVDS OUTPUT MODE (STANDARD and LOW POWER)
tD
ENC to DATA Delay
(Note 7)
1.3
2.5
3.8
ns
tC
ENC to CLKOUT Delay
(Note 7)
1.3
2.5
3.8
ns
tSKEW
DATA to CLKOUT Skew
(tC-tD) (Note 7)
– 0.6
0
0.6
ns
tRISE
Output Rise Time
0.5
ns
tFALL
Output Fall Time
0.5
ns
Data Latency
Data Latency
7
Cycles
CMOS OUTPUT MODE
tD
ENC to DATA Delay
(Note 7)
1.3
2.7
4.0
ns
tC
ENC to CLKOUT Delay
(Note 7)
1.3
2.7
4.0
ns
tSKEW
DATA to CLKOUT Skew
(tC-tD) (Note 7)
– 0.6
0
0.6
ns
Data Latency
Data Latency
Full Rate CMOS
7
Cycles
Demuxed
7
Cycles


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