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PL560-49QILR Datasheet(PDF) 10 Page - PhaseLink Corporation |
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PL560-49QILR Datasheet(HTML) 10 Page - PhaseLink Corporation |
10 / 15 page Analog Frequency Multiplier PL560-xx VCXO Family 47745 Fremont Blvd., Fremont, CA 94538 TEL (510) 492-0990, FAX (510) 492-0991 www.phaselink.com Rev.:02-09-07 Page 10 LVDS ELECTRICAL CHARACTERISTICS PARAMETERS SYMBOL CONDITIONS MIN. TYP. MAX. UNITS Supply Current (with loaded outputs) IDD Fout = 622 MHz 55 60 mA Operating Voltage VDD 2.25 3.63 V Output Clock Duty Cycle @ 1.25V (LVDS) 45 50 55 % Short Circuit Current ±50 mA Output Differential Voltage VOD 247 355 454 mV VDD Magnitude Change ∆VOD -50 50 mV Output High Voltage VOH 1.4 1.6 V Output Low Voltage VOL 0.9 1.1 V Offset Voltage VOS 1.125 1.2 1.375 V Offset Magnitude Change ∆VOS RL = 100 (see figure) 0 3 25 mV Power-off Leakage IOXD Vout = VDD or GND VDD = 0V ±1 ±10 A Output Short Circuit Current IOSD -5.7 -8 mA Differential Clock Rise Time tr 0.2 0.5 0.7 ns Differential Clock Fall Time tf RL = 100 CL = 10 pF (see figure) 0.2 0.5 0.7 ns OUT V DIFF R L = 100Ω C L = 10pF C L = 10pF LVDS Switching Test Circuit OUT LVDS Transition Time Waveform OUT OUT 0V (Differential) 0V 20% 80% 20% 80% tR tF VDIFF OUT OUT V OD V OS 50Ω 50Ω LVDS Levels Test Circuit |
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