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LTC2487IDEPBF Datasheet(PDF) 4 Page - Linear Technology |
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LTC2487IDEPBF Datasheet(HTML) 4 Page - Linear Technology |
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4 / 32 page  LTC2487 2487fa i2c inpuTs anD DigiTal ouTpuTs The ● denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. (Note 3) analog inpuT anD reFerence The ● denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. (Note 3) SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS IN+ Absolute/Common Mode IN+ Voltage (IN+ Corresponds to the Selected Positive Input Channel) GND – 0.3V VCC + 0.3V V IN– Absolute/Common Mode IN– Voltage (IN– Corresponds to the Selected Negative Input Channel) GND – 0.3V VCC + 0.3V V VIN Input Differential Voltage Range (IN+ – IN–) ● –FS +FS V FS Full Scale of the Differential Input (IN+ – IN–) ● 0.5VREF/Gain V LSB Least Significant Bit of the Output Code ● FS/216 REF+ Absolute/Common Mode REF+ Voltage ● 0.1 VCC V REF– Absolute/Common Mode REF– Voltage ● GND REF+ – 0.1V V VREF Reference Voltage Range (REF+ – REF–) ● 0.1 VCC V CS(IN+) IN+ Sampling Capacitance 11 pF CS(IN–) IN– Sampling Capacitance 11 pF CS(VREF) VREF Sampling Capacitance 11 pF IDC_LEAK(IN+) IN+ DC Leakage Current Sleep Mode, IN+ = GND ● –10 1 10 nA IDC_LEAK(IN–) IN– DC Leakage Current Sleep Mode, IN– = GND ● –10 1 10 nA IDC_LEAK(REF+) REF+ DC Leakage Current Sleep Mode, REF+ = VCC ● –100 1 100 nA IDC_LEAK(REF–) REF– DC Leakage Current Sleep Mode, REF– = GND ● –100 1 100 nA tOPEN MUX Break-Before-Make 50 ns QIRR MUX Off Isolation VIN = 2VP-P DC to 1.8MHz 120 dB SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS VIH High Level Input Voltage ● 0.7VCC V VIL Low Level Input Voltage ● 0.3VCC V VIHA Low Level Input Voltage for Address Pins CA0, CA1 ● 0.05VCC V VILA High Level Input Voltage for Address Pins CA0, CA1 ● 0.95VCC V RINH Resistance from CA0, CA1 to VCC to Set Chip Address Bit to 1 ● 10 k W RINL Resistance from CA0, CA1 to GND to Set Chip Address Bit to 0 ● 10 k W RINF Resistance from CA0, CA1 to GND or VCC to Set Chip Address Bit to Float ● 2 M W II Digital Input Current ● –10 10 µA VHYS Hysteresis of Schmitt Trigger Inputs (Note 5) ● 0.05VCC V VOL Low Level Output Voltage (SDA) I = 3mA ● 0.4 V tOF Output Fall Time VIH(MIN) to VIL(MAX) Bus Load CB 10pF to 400pF (Note 14) ● 20 + 0.1CB 250 ns IIN Input Leakage 0.1VCC ≤ VIN ≤ VCC ● 1 µA CCAX External Capacitative Load on Chip Address Pins (CA0, CA1) for Valid Float ● 10 pF |
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Similar Description - LTC2487IDEPBF |
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