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SN65LVDS391PW Datasheet(PDF) 11 Page - Texas Instruments |
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SN65LVDS391PW Datasheet(HTML) 11 Page - Texas Instruments |
11 / 18 page SN65LVDS387, SN75LVDS387, SN65LVDS389 SN75LVDS389, SN65LVDS391, SN75LVDS391 HIGH-SPEED DIFFERENTIAL LINE DRIVERS SLLS362D – SEPTEMBER 1999 – REVISED MAY 2001 11 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 APPLICATION INFORMATION width abs . jitter height unit interval Figure 15. Typical LVDS Eyepattern A generally accepted range of jitter at the receiver inputs that allows data recovery is 5% to 20% of the unit interval (data pulse width). Table 1 shows the signaling rate achieved on various cables and lengths at a 5% eyepattern jitter with a typical LVDS driver. Table 1. Signaling Rates for Various Cables for 5% Eyepattern Jitter LENGTH CABLE† LENGTH (m) A (Mbps) B (Mbps) C (Mbps) D (Mbps) E (Mbps) F (Mbps) 1 240 200 240 270 180 230 5 205 210 230 250 215 230 10 180 150 195 200 145 180 † Cable A: CAT 3, specified up to 16 MHz, no shield, outside conductor diameter ( ∅) 0.52 mm Cable B: CAT 5, specified up to 100 MHz, no shield, ∅ 0.52 mm Cable C: CAT 5, specified up to 100 MHz, taped over all shield, ∅ 0.52 mm Cable D: CAT 5 (exceeding CAT 5), specified up to 300 MHz, braided over all shield plus taped individual shield for any pair, ∅ 0.64 mm (AWG22) Cable E: CAT 5 (exceeding CAT 5), specified up to 350 MHz, ∅ 0.64 mm (AWG22), no shield Cable F: CAT 5 (exceeding CAT 5), specified up to 350 MHz, “self-shielded”, ∅ 0.64 mm (AWG22) During synchronous parallel transfers, skew between the data and clock lines will also reduce the timing margin. This must be accounted for in the system timing budget. Fortunately, the low output skew of this LVDS driver will generally be a small portion of this budget. other LVDS products For other products and applications notes in the LVDS and LVDM product families visit our Web site at http://www.ti.com/sc/datatran. |
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