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LTC3221-3.3 Datasheet(PDF) 6 Page - Linear Technology |
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LTC3221-3.3 Datasheet(HTML) 6 Page - Linear Technology |
6 / 12 page LTC3221/ LTC3221-3.3/LTC3221-5 6 3221f The LTC3221 family uses a switched capacitor charge pump to boost VIN to a regulated output voltage. Regulation is achieved by monitoring the output voltage, VOUT using a comparator (CMP in the Block Diagram) and keeping it within a hysteresis window. If VOUT drops below the lower trip point of CMP, VOUT is charged by the controlled cur- rent, ISW in series with the flying capacitor CFLY. Once VOUT goes above the upper trip point of CMP, or if the upper trip point is not reached after 0.8µs, CFLY is disconnected from VOUT. The bottom plate of CFLY is then connected to GND to allow ISW to replenish the charge on CFLY for 0.8µs. After which, ISW is turned off to keep the operating supply current low. CMP continues to monitor VOUT and turns on ISW if the lower threshold is reached again. Shutdown Mode The ⎯S⎯H⎯D⎯N pin is a CMOS input with a threshold voltage of approximately 0.8V. The LTC3221-3.3/ LTC3221-5 are in shutdown when a logic low is applied to the ⎯S⎯H⎯D⎯N pin. In shutdown mode, all circuitry is turned off and the LTC3221-3.3/ LTC3221-5 draw only leakage current from the VIN supply. Furthermore, VOUT is disconnected from VIN. Since the ⎯S⎯H⎯D⎯N pin is a very high impedance CMOS input, it should never be allowed to float. When ⎯S⎯H⎯D⎯N is asserted low, the charge pump is first dis- abled, but the LTC3221-3.3/LTC3221-5 continue to draw 5µA of supply current. This current will drop to zero when the output voltage (VOUT) is fully discharged to 0V. OPERATIO (Refer to Block Diagrams) LTC3221-3.3/LTC3221-5 LTC3221 ISW CMP SHDN VOUT C+ VIN C– GND 1 5 2 4 6 3 – + VREF CONTROL ISW CMP FB VOUT C+ VIN C– GND 1 5 2 4 6 – + VREF CONTROL 3 2 1 2 1 2 1 2 1 3221 BD BLOCK DIAGRA PI FU CTIO S C+ (Pin 1): Flying Capacitor Positive Terminal. C– (Pin 2): Flying Capacitor Negative Terminal. ⎯S⎯H⎯D⎯N (Pin 3) (LTC3221-3.3/LTC3221-5): Active Low Shutdown Input. A low on ⎯S⎯H⎯D⎯N disables the LTC3221-3.3/ LTC3221-5. ⎯S⎯H⎯D⎯N must not be allowed to float. FB (Pin 3) (LTC3221): Feedback. The voltage on this pin is compared to the internal reference voltage (1.23V) by the error comparator to keep the output in regulation. An external resistor divider is required between VOUT and FB to program the output voltage. GND (Pin 4): Ground. Should be tied to a ground plane for best performance. VIN (Pin 5): Input Supply Voltage. VIN should be bypassed with a 2.2µF low ESR capacitor. VOUT (Pin 6): Regulated Output Voltage. For best perfor- mance, VOUT should be bypassed with a 2.2µF or higher low ESR capacitor as close as possible to the pin. Exposed Pad (Pin 7) Ground. The exposed pad must be soldered to PCB ground to provide electrical contact and optimum thermal performance. |
Similar Part No. - LTC3221-3.3 |
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Similar Description - LTC3221-3.3 |
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