SN74LVCH16374A

16-BIT EDGE-TRIGGERED D-TYPE FLIP-FLOP

WITH 3-STATE OUTPUTS

SCAS565L – MARCH 1996 – REVISED SEPTEMBER 2003

2

POST OFFICE BOX 655303

description/ordering information (continued)

resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

Inputs can be driven from either 3.3-V or 5-V devices. This feature allows the use of this device as a translator

in a mixed 3.3-V/5-V system environment.

Active bus-hold circuitry holds unused or undriven inputs at a valid logic state. Use of pullup or pulldown resistors

with the bus-hold circuitry is not recommended.

The SN74LVCH16374A is particularly suitable for implementing buffer registers, I/O ports, bidirectional bus

drivers, and working registers. It can be used as two 8-bit flip-flops or one 16-bit flip-flop. On the positive

transition of the clock (CLK) input, the Q outputs of the flip-flop take on the logic levels set up at the data

(D) inputs.

preventing damaging current backflow through the device when it is powered down.

terminal assignments

123456

A

1OE

NC

NC

NC

NC

1CLK

B

1Q2

1Q1

GND

GND

1D1

1D2

C

1Q4

1Q3

VCC

VCC

1D3

1D4

D

1Q6

1Q5

GND

GND

1D5

1D6

E

1Q8

1Q7

1D7

1D8

F

2Q1

2Q2

2D2

2D1

G

2Q3

2Q4

GND

GND

2D4

2D3

H

2Q5

2Q6

VCC

VCC

2D6

2D5

J

2Q7

2Q8

GND

GND

2D8

2D7

K

2OE

NC

NC

NC

NC

2CLK

NC – No internal connection

FUNCTION TABLE

(each flip-flop)

INPUTS

OUTPUT

OE

CLK

D

OUTPUT

Q

L

↑

H

H

L

↑

LL

L

H or L

X

Q0

H

X

X

Z

GQL OR ZQL PACKAGE

(TOP VIEW)

A

B

C

D

E

F

G

H

J

K

1

2345

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