DI-52 datasheet(2/2 Pages) POWERINT

2 page

www.powerint.com

7/03

DI-52

Table 1. Transformer Construction Information.

Figure 2. Efficiency vs. Output Power.

conduction path for the output inductor (L4) current when the

transformer reset is complete.

Key Design Points

• Transformer core reset is critical in this design. MOSFET

gate loading will affect the transformer-reset waveform.

Capacitors C20, C22 and C

Q1GS will all load transformer

reset. Choose values to ensure sufficient reset at low line

and safe maximum drain voltage at high line. Also use

300 kHz operation for longest reset time.

• Capacitors C20 and C22 will capacitively drive MOSFET

gate capacitances C

Q2GS and CQ1GS, respectively. C20 and

C22 should be chosen to ensure that gate drive voltage

attains turn-on threshold of MOSFET (Vg

TH) at worst case

conditions (low line for forward MOSFET).

• Reduce transformer leakage inductance by filling each

winding layer across the entire width of the bobbin.

Table 2. L4 Output Inductor Design Parameters.

Pout (W)

100

36 VDC

48 VDC

72 VDC

TRANSFORMER PARAMETERS

Core Material

Bobbin

Winding Details

Bias (2-5), Primary-1 (4-NC),

12 V (9,10-6,7), Primary-2 (NC-1)

Winding Order and

Pin Numbers

Primary Inductance

Primary Resonant

Frequency

Leakage Inductance

Primary 5T + 5T, 4 x 26 AWG

Bias 5T, 1 x 30 AWG

12 V 6T, 4 x 26 AWG

3.8 MHz (minimum)

Ferroxcube P/N: EFD25, ungapped

10-pin EFD25 surface mount bobbin

Pin (1-4): 190 µH ±25% @ 300 kHz

1 µH (maximum)

INDUCTOR PARAMETERS

Core Material

Bobbin

Winding Details

Inductance

Pin (4,5-9,10): 40 µH ±10%

@ 300 kHz

Main (4,5-9,10)

Main 18T, 3 x 24 AWG

10-pin EFD20 surface mount bobbin

Ferroxcube P/N: EFD20-3F3

gap for inductance required

Winding Order and

Pin Numbers

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