STM6315

Operation

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2

Operation

2.1

Reset output

The STM6315 Microprocessor Reset Circuit has an active-low, open drain reset output. This

output structure will sink current when RST is asserted. Connect a pull-up resistor from RST

to any supply voltage up to 6V (see Figure 4 on page 6). Select a resistor value large

enough to register a logic low, and small enough to register a logic high while supplying all

input current and leakage paths connected to the reset output line. A 10k pull-up is sufficient

in most applications.

2.2

Manual reset input

returns high. The MR input has an internal pull-up resistor 63k

Ω (typ), allowing it to be left

open if not used.

This input can be driven with TTL/CMOS-logic levels or with open drain/collector outputs.

function (see Figure 4 on page 6); external debounce circuitry is not required. If the device is

additional noise immunity.

2.3

page 11 shows typical transient duration versus reset comparator overdrive (for which the

STM6315 will NOT generate a reset pulse). The graph was generated using a negative

by the magnitude indicated (Reset Threshold Overdrive). The graph indicates the maximum

magnitude of the transient increases (further below the threshold), the maximum allowable

pulse width decreases. Any combination of duration and overdrive which lies under the

curve will NOT generate a reset signal (see Figure 12). A 0.1µF bypass capacitor mounted