PIC18F2520 datasheet(11/16 Pages) MICROCHIP

Part #	PIC18F2520

Description	28/40/44-Pin Enhanced Flash Microcontrollers with 10-Bit A/D and nanoWatt Technology

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Manufacturer	MICROCHIP [Microchip Technology]

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DS80209D-page 11

PIC18F2420/2520/4420/4520

33. Module: Timer1 (Asynchronous Counter)

When writing to the TMR1H register, under

specific conditions, it is possible that the TMR1L

register will miss a count while connected to the

external oscillator via the T1OSO and T1OSI pins.

When Timer1 is started, the circuitry looks for a

falling edge before a rising edge can increment the

counter. Writing to the TMR1H register is similar to

starting Timer1; therefore, the former logic stated

applies any time the TMR1H register is written. If

the TMR1H register is not completely written to

during the high pulse of the external clock, then the

TMR1L register will miss a count due to the circuit

operation stated previously. The high pulse of a

32.768 kHz external clock crystal yields a 15.25

μs

window for the write to TMR1H to occur. The

amount of instructions that can be executed within

this window is frequency dependent, as shown in

Table 4 below.

Work around

Operating Conditions: FOSC

≥ 4 MHz, no wake-ups

from Sleep, Timer1 interrupt enabled, global

interrupts enabled.

The code excerpts in Example 5 and Example 6

show how the TMR1H register can be updated

while the external clock (32.768 kHz) is still on its

high pulse.

The importance of the code examples is that the

bold instructions are executed within the first

15.25

μs high pulse on the external clock after the

Timer1 overflow occurs. This will allow the TMR1L

register to increment correctly.

TABLE 4:

FREQUENCY DEPENDENT INSTRUCTION EXECUTION AMOUNTS

EXAMPLE 5:

PIC18 HIGH PRIORITY INTERRUPT SERVICE ROUTINE

FOSC

TCY (

μs)

TCY within 15.25

μs

1MHz

4

3.81

2MHz

2

7.63

4 MHz

1

15.25

8 MHz

0.5

30.5

16 MHz

0.25

61

20 MHz

0.2

76.25

40 MHz

0.1

152.5

ISR @ 0x0008

; (3-4Tcy), fixed interrupt latency

BRA

HIGHINT

; (2Tcy), go to high priority interrupt routine

HIGHINT

BTFSC

PIR1, TMR1IF

; (1Tcy), did a Timer1 overflow occur?

BSF

TMR1H, 7

; (1Tcy) Yes, reload for a 1 second overflow

RETFIE

FAST

Total = 7-8 TCY (if Timer1 overflow occurred)

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