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MH8S64QFC-8 Datasheet(PDF) 5 Page - Mitsubishi Electric Semiconductor |
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MH8S64QFC-8 Datasheet(HTML) 5 Page - Mitsubishi Electric Semiconductor |
5 / 55 page MH8S64QFC -7,-7L,-8,-8L,-10,-10L 536870912-BIT (8388608 - WORD BY 64-BIT)SynchronousDRAM MITSUBISHI LSIs ( / 55 ) MITSUBISHI ELECTRIC 12.Jan.1999 Preliminary Spec. Some contents are subject to change without notice. MIT-DS-0306-0.0 5 Serial Presence Detect Table II 31 Density of each bank on module 64MByte 10 36-61 Superset Information (may be used in future) option 00 62 SPD Revision rev 1 01 63 Checksum for bytes 0-62 Check sum for -8 4D Check sum for -10 4A 64-71 Manufactures Jedec ID code per JEP-108E MITSUBISHI 1CFFFFFFFFFFFFFF 72 Manufacturing location Miyoshi,Japan 01 Tajima,Japan 02 NC,USA 03 Germany 04 73-90 Manufactures Part Number MH8S64QFC-8 4D48385336345146432D3820202020202020 MH8S64QFC-10 91-92 Revision Code PCB revision rrrr 93-94 Manufacturing date year/week code yyww 95-98 Assembly Serial Number serial number ssssssss 99-125 Manufacture Specific Data option 00 126 Intetl specification frequency 100MHz 64 127 Intel specification CAS# Latency support 06 128+ Unused storage locations open 00 4D48385336345146432D3130202020202020 32 Command and Address signal input setup time -7,8 -10 2ns N/A 20 00 20 00 33 Command and Address signal input hold time -7,8 -10 1ns N/A 10 00 34 Data signal input setup time -7,8 -10 2ns N/A 35 Data signal input hold time -7,8 -10 1ns N/A 10 00 -7,8 -10 rev 1.2A 12 Check sum for -7 0D MH8S64QFC-7 4D48385336345146432D3720202020202020 -7,8 -10 66MHz 66 -7 -10 8F CL=2/3,AP,CK0 CL=2/3 MH8S64QFC-8L 4D48385336345146432D384C202020202020 MH8S64QFC-10L 4D48385336345146432D31304C2020202020 MH8S64QFC-7L 4D48385336345146432D374C202020202020 -8 8D CL=3,AP,CK0 The -7, -8 indicate also -7L, -8L. |
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