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TDA4850 Datasheet(PDF) 10 Page - NXP Semiconductors

Part No. TDA4850
Description  Horizontal and vertical deflection controller for VGA/XGA and multi-frequency monitors
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Maker  PHILIPS [NXP Semiconductors]
Homepage  http://www.nxp.com
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 10 page
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1997 Jun 05
10
Philips Semiconductors
Product specification
Horizontal and vertical deflection controller
for VGA/XGA and multi-frequency monitors
TDA4850
Horizontal output (open-collector); see Fig.3
V3
output voltage LOW
I3 =20mA
−−
0.3
V
I3 =60mA
−−
0.8
V
tp/tH
tH duty cycle
42
45
48
%
VP
threshold to activate too low supply voltage
protection
horizontal output off
5.3
V
horizontal output on
5.6
V
Horizontal clamping/blanking generator output; see Fig.3
V8
output voltage LOW
H and V scanning
−−
0.9
V
blanking output voltage
internal V blanking
1.8
2.1
2.4
V
external H blanking
1.8
2.1
2.4
V
clamping output voltage
H-sync on pin 9
3.5
3.9
4.3
V
I8
internal sink current for all output levels
H and V scanning
2.3
2.9
3.5
mA
t8
clamping pulse start
with end of H-sync
tclp
clamping pulse width
0.8
1.0
1.2
µs
S
steepness of rise and fall times
40
ns/V
Vertical oscillator (Vref = 6.25 V)
fo
vertical free-running frequency
R15 =22kΩ;
C16 = 0.1 µF
40
42
43.3
Hz
fV
nominal vertical sync range
no fo adjustment
50
110
Hz
V15
voltage on pin 15
R15 =22kΩ
2.8
3.0
3.2
V
td
delay between sync pulse and start of
vertical scan
measured on pin 8
in VGA/XGA mode, activated by an
external resistor on pin 7
500
575
650
µs
in multi-frequency mode
V7 < 50 mV
240
300
360
µs
I12
control current for amplitude control
−±200
−µA
C12
capacitor for amplitude control
−−
0.33
µF
Vertical differential output; see Fig.4
Io
differential output current between
pins 5 and 6 (peak-to-peak value)
mode 3; I13 > −135 µA;
R15 =22kΩ
0.9
1.0
1.1
mA
maximum offset current error
Io =1mA
−−±2.5
%
maximum linearity error
−−±1.5
%
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT




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