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W29C102-90 Datasheet(PDF) 4 Page - Winbond

Part # W29C102-90
Description  64K 16 CMOS FLASH MEMORY
Download  21 Pages
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Manufacturer  WINBOND [Winbond]
Direct Link  http://www.winbond.com
Logo WINBOND - Winbond

W29C102-90 Datasheet(HTML) 4 Page - Winbond

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W29C102
- 4 -
software data protection feature. To reset the device to unprotected mode, a six-word command
sequence is required. See Table 3 for specific codes and Figure 10 for the timing diagram.
Hardware Data Protection
The integrity of the data stored in the W29C102 is also hardware protected in the following ways:
(1) Noise/Glitch Protection: A WE pulse of less than 15 nS in duration will not initiate a write cycle.
(2) VDD Power Up/Down Detection: The programming operation is inhibited when VDD is less than
2.5V.
(3) Write Inhibit Mode: Forcing OE low, CE high, or WE high will inhibit the write operation. This
prevents inadvertent writes during power-up or power-down periods.
(4) VDD power-on delay: When VDD has reached its sense level, the device will automatically time-out
5 mS before any write (erase/program) operation.
Data Polling (DQ7 & DQ15)- Write Status Detection
The W29C102 includes a data polling feature to indicate the end of a programming cycle. When the
W29C102 is in the internal programming cycle, any attempt to read DQ7 and/or DQ15 of the last word
loaded during the page/word-load cycle will receive the complement of the true data. Once the
programming cycle is completed. DQ7 will show the true data.
Toggle Bit (DQ6 & DQ14)- Write Status Detection
In addition to data polling, the W29C102 provides another method for determining the end of a
program cycle. During the internal programming cycle, any consecutive attempts to read DQ6 and/or
DQ14 will produce alternating 0's and 1's. When the programming cycle is completed, this toggling
between 0's and 1's will stop. The device is then ready for the next operation.
5-Volt-only Software Chip Erase
The chip-erase mode can be initiated by a six-word command sequence. After the command loading
cycles, the device enters the internal chip erase mode, which is automatically timed and will be
completed in 50 mS. The host system is not required to provide any control or timing during this
operation.
Product Identification
The product ID operation outputs the manufacturer code and device code. Programming equipment
automatically matches the device with its proper erase and programming algorithms.
The manufacturer and device codes can be accessed by software or hardware operation. In the
software access mode, a six-word command sequence can be used to access the product ID. A read
from address 0000H outputs the manufacturer code (00DAh). A read from address 0001H outputs the
device code (004Fh). The product ID operation can be terminated by a three-word command
sequence.
In the hardware access mode, access to the product ID is activated by forcing CE and OE low, WE
high, and raising A9 to 12 volts.


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