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TDA4858 Datasheet(PDF) 5 Page - NXP Semiconductors

Part No. TDA4858
Description  Economy Autosync Deflection Controller (EASDC)
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Maker  PHILIPS [NXP Semiconductors]
Homepage  http://www.nxp.com
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 5 page
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1997 Oct 27
5
Philips Semiconductors
Product specification
Economy Autosync Deflection Controller
(EASDC)
TDA4858
PINNING
SYMBOL PIN
DESCRIPTION
HFLB
1
horizontal flyback input
XRAY
2
X-ray protection input
BOP
3
B+ control OTA output;
comparator input
BSENS
4
B+ control comparator input/output
BIN
5
B+ control OTA input
BDRV
6
B+ control driver output
HDRV
7
horizontal driver output
PGND
8
power ground
VCC
9
supply voltage
CLSEL
10
selection input for horizontal clamping
trigger
EWDRV
11
EW parabola output
VOUT2
12
vertical output 2 (ascending sawtooth)
VOUT1
13
vertical output 1 (descending
sawtooth)
VSYNC
14
vertical synchronization input/output
(TTL level)
HSYNC
15
horizontal/composite synchronization
input (TTL level or sync-on-video)
CLBL
16
video clamping pulse/vertical blanking
and protection output
VPOS
17
vertical shift input
VAMP
18
vertical size input
VSCOR
19
vertical S-correction input
EWTRP
20
EW trapezium correction input
EWPAR
21
EW parabola amplitude input
VAGC
22
external capacitor for vertical
amplitude control
VREF
23
external resistor for vertical oscillator
VCAP
24
external capacitor for vertical oscillator
SGND
25
signal ground
HPLL1
26
external filter for PLL1
HBUF
27
buffered f/v voltage output
HREF
28
reference current for horizontal
oscillator
HCAP
29
external capacitor for horizontal
oscillator
HPOS
30
horizontal shift input
HPLL2
31
external filter for PLL2/soft start
EWWID
32
horizontal size input
Fig.2 Pin configuration.
handbook, halfpage
TDA4858
MGD095
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
HFLB
XRAY
BOP
BSENS
BIN
BDRV
HDRV
PGND
VCC
CLSEL
EWDRV
VOUT2
VOUT1
VSYNC
HSYNC
CLBL
EWWID
HPLL2
HPOS
HCAP
HREF
HBUF
HPLL1
SGND
VCAP
VREF
VAGC
EWPAR
EWTRP
VSCOR
VAMP
VPOS
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17




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