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TDA4866 Datasheet(PDF) 7 Page - NXP Semiconductors

Part No. TDA4866
Description  Full bridge current driven vertical deflection booster
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Maker  PHILIPS [NXP Semiconductors]
Homepage  http://www.nxp.com
Logo 

 7 page
background image
1999 Jun 14
7
Philips Semiconductors
Product specification
Full bridge current driven vertical deflection
booster
TDA4866
Notes
1. Up to 60 V
≥ VFB ≥ 40 V a decoupling capacitor CFB =22 µF (between pins 7 and 5) and a resistor RFB = 100 Ω
(between pin 7 and VFB) are required (see Fig.4).
2. Saturation voltages of output stages A and B can be increased in the event of negative input currents I1, 2 < −500 µA.
3.
with Ideflc = common mode deflection current and Iidc = common mode input current.
4. Deviation of the output slope at a constant input slope.
5. Frequency behaviour of Goi and Gofb:
a)
−3 dB open-loop bandwidth (−45°) at 15 kHz; second pole (−135°) at 1.3 MHz.
b) Open-loop gain at second pole (
−135°) 55 dB.
Idefl(ripple)
output ripple current as a function of
supply ripple
VP(ripple) = ±0.5 V;
Iid = 0; closed-loop
−±1
mA
Flyback generator
V7, 6
voltage drop during flyback
reverse
Idefl = 0.7 A
−−2.0
−3.0
V
Idefl = 1.0 A
−−2.3
−3.5
V
forward
Idefl = 0.7 A
+5.6
+6.1
V
Idefl = 1.0 A
+5.9
+6.5
V
V6
switching on threshold voltage
VP − 1
VP + 1.5 V
V6
switching off threshold voltage
VP − 1.5 −
VP +1
V
I7
flyback current during flyback
−−±1A
Guard circuit
V8
output voltage
guard on
7.5
8.5
10
V
V8
output voltage
guard on; VP = 8.2 V
6.9
VP − 0.4 V
I8
output current
guard on
5
−−
mA
V8
output voltage
guard off
−−
0.4
V
I8
output current
guard off; V8 = 5 V
0.5
1
1.5
mA
V8(ext.)
allowable external voltage on pin 8
0
13
V
VP ≤ 13 V
0
VP + 0.3 V
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
D
i
I
deflc
I
idc
-----------
I
id
I
defl
---------
×
=




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