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TDA4866 Datasheet(PDF) 4 Page - NXP Semiconductors

Part No. TDA4866
Description  Full bridge current driven vertical deflection booster
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Maker  PHILIPS [NXP Semiconductors]
Homepage  http://www.nxp.com
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 4 page
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1999 Jun 14
4
Philips Semiconductors
Product specification
Full bridge current driven vertical deflection
booster
TDA4866
FUNCTIONAL DESCRIPTION
The TDA4866 consists of a differential input stage, two
output stages, a flyback generator, a protection circuit for
the output stages and a guard circuit.
Differential input stage
The differential input stage has a high CMRR differential
current mode input (pins 1 and 2) that results in a high
electro-magnetic immunity and is especially suitable for
driver units with differential (e.g. TDA485x, TDA4841PS)
and single ended current signals. Driver units with voltage
outputs are simply applicable as well (e.g. two additional
resistors are required).
The differential input stage delivers the driver signals for
the output stages.
Output stages
The two output stages are current driven in opposite phase
and operate in combination with the deflection coil in a full
bridge configuration. Therefore the TDA4866 requires no
external coupling capacitor (e.g. 2200
µF) and operates
with one supply voltage VP and a separate adjustable
flyback supply voltage VFB only. The deflection current
through the coil (Idefl) is measured with the resistor Rm
which produces a voltage drop (Urm) of: Urm ≈ Rm × Idefl.
At the feedback input (pin 9) a part of Idefl is fed back to the
input stage. The feedback input has a current input
characteristic which holds the differential voltage between
pin 9 and the output pin 4 on zero. Therefore the feedback
current (I9) through Rref is:
The input stage directly compares the driver currents into
pins 1 and 2 with the feedback current I9. Any difference of
this comparison leads to a more or less driver current for
the output stages. The relation between the deflection
current and the differential input current (Iid) is:
Due to the feedback loop gain (VU loop) and internal
bondwire resistance (Rbo) correction factors are required
to determine the accurate value of Idefl:
I
9
R
m
R
ref
----------
I
defl
×
I
id
I
9
R
m
R
ref
----------
I
defl
×
=
I
defl
I
id
R
ref
R
m
R
bo
+
------------------------
×
1
1
V
Uloop
-----------------


×
=
with Rbo ≈ 70 mΩ and
for Idefl = 0.7 A.
The deflection current can be adjusted up to
±1 A by
varying Rref when Rm is fixed to 1 Ω.
High bandwidth and excellent transition behaviour is
achieved due to the transimpedance principle this circuit
works with.
Flyback generator
During flyback the flyback generator supplies the output
stage A with the flyback voltage. This makes it possible to
optimize power consumption (supply voltage VP) and
flyback time (flyback voltage VFB). Due to the absence of a
decoupling capacitor the flyback voltage is fully available.
In parallel with the deflection yoke and the damping
resistor (Rp) an additional RC combination (RSP; CSP) is
necessary to achieve an optimized flyback behaviour.
Protection
The output stages are protected against:
• Thermal overshoot
• Short-circuit of the coil (pins 4 and 6).
Guard circuit
The internal guard circuit provides a blanking signal for the
CRT. The guard signal is active HIGH:
• At thermal overshoot
• When feedback loop is out of range
• During flyback.
The internal guard circuit will not be activated, if the input
signals on pins 1 and 2 delivered from the driver circuit are
out of range or at short-circuit of the coil (pins 4 and 6).
For this reason an external guard circuit can be applied to
detect failures of the deflection (see Fig.6). This circuit will
be activated when flyback pulses are missing, which is the
indication of any abnormal operation.
1
1
V
Uloop
-----------------

 0.98




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