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TDA4886A Datasheet(PDF) 7 Page - NXP Semiconductors

Part No. TDA4886A
Description  140 MHz video controller with I2C-bus
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Maker  PHILIPS [NXP Semiconductors]
Homepage  http://www.nxp.com
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 7 page
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1998 Dec 04
7
Philips Semiconductors
Product specification
140 MHz video controller with I2C-bus
TDA4886A
7
FUNCTIONAL DESCRIPTION
See block diagram (Fig.1) and definition of levels and
output signals (see Chapter “Characteristics” notes 1 to 3;
Figs 3 to 6).
7.1
Signal input stage (input clamping, blanking
and clipping)
The RGB input signals with nominal signal amplitude of
0.7 V are capacitively coupled into the TDA4886A from a
low-ohmic source (75
Ω recommended) and actively
clamped to an internal DC voltage during signal black
level. Because of the high-ohmic input impedance of the
TDA4886A the coupling capacitor (which also functions as
a storage capacitor between clamping pulses) can be
relatively small (10 nF recommended). Very small input
currents will discharge the coupling capacitor resulting in
black output signals for missing input clamping pulses.
Composite signals will not disturb normal operation
because a clipping circuit cuts all signal parts below
black level.
A fast signal blanking stage belongs to the input stage
which is driven by several blanking pulses (see Section
“Clamping and blanking pulses”) and control bit DISV = 1.
During the off condition the internal reference black level
will be inserted instead of the input signals.
7.2
Electronic potentiometer stages
7.2.1
CONTRAST CONTROL (DRIVEN BY I2C-BUS,
6-BIT DAC)
The input signals related to the internal reference black
level can be simultaneously adjusted by contrast control
with a control range of typically 32 dB. The nominal
contrast setting is defined for 26H (4.2 dB below
maximum).
7.2.2
BRIGHTNESS CONTROL (DRIVEN BY I2C-BUS,
6-BIT DAC)
With brightness control the video black level will be shifted
in relation to the reference black level simultaneously for
all three channels. With a negative setting (maximum 10%
of nominal signal amplitude) dark signal parts will be lost in
ultra black while for positive settings (maximum 30% of
nominal signal amplitude) the background will alter from
black to grey. The nominal brightness setting (10H) is no
shift. The brightness setting is also valid for OSD signals.
During blanking and output clamping the video black level
will be blanked to reference black level (brightness
blanking).
7.2.3
GAIN CONTROL (DRIVEN BY I2C-BUS,6-BIT DAC)
AND GREY SCALE TRACKING
Gain control is used for white point adjustment (correction
for different voltage to light amplification of the three colour
channels) and therefore individual for the three channels.
The video signals related to the reference black level can
be gain controlled within a range of typically 7.3 dB.
The nominal setting is maximum gain. The video signal is
the addition of the contrast controlled input signal and the
brightness shift. The gain setting is also valid for OSD
signals, thus the complete ‘grey scale’ is effected by gain
control.
7.3
Output stage
In the output stage the nominal input signal will be
amplified to 2.8 V output colour signal at nominal contrast
and maximum gain. The maximum input to output
amplification at maximum contrast and gain settings is
16.2 dB. By output clamping the reference black level
can be adjusted. In order to achieve fast rise and fall times
of the output signals with minimum crosstalk between the
channels, each output stage has its own supply voltage
pin.
7.4
Pedestal blanking
For the video portion the reference black level should
correspond to the ‘extended cut-off voltage’ at the
cathode. Nevertheless during vertical flyback retrace lines
may be visible, though blanking to spot cut-off is useful.
With control bit PEDST = 1 the pedestal black level will be
adjusted by output clamping instead of the reference black
level (see Fig.5). The pedestal black level is more negative
than the video black level at minimum brightness setting
and the voltage difference to reference black level is fixed.
7.5
Output clamping, feedback references and
DAC outputs
The aim of the output clamping (pins FB/R1, FB/R2
and FB/R3 with control bit FPOL = 0, internal feedback
with control bit FPOL = 1) is to set the reference black level
of the signal outputs to a value which corresponds to the
‘extended cut-off voltage’ of the CRT cathodes. With a lack
of output clamping pulses the integrated storage
capacitors will be discharged resulting in output signals
going to switch-off voltage. Feedback references are
driven by the I2C-bus.




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