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TDA5145TS Datasheet(PDF) 10 Page - NXP Semiconductors

Part No. TDA5145TS
Description  Brushless DC motor drive circuit
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Maker  PHILIPS [NXP Semiconductors]
Homepage  http://www.nxp.com
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 10 page
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1998 Oct 27
10
Philips Semiconductors
Product specification
Brushless DC motor drive circuit
TDA5145TS
The TDA5145TS is designed for systems with low current
consumption: use of I2L logic, adaptive base drive for the
output transistors (patented).
Adjustments
The system has been designed in such a way that the
tolerances of the application components are not critical.
However, the approximate values of the following
components must still be determined:
• The start capacitor; this determines the frequency of the
start oscillator.
• The two capacitors in the adaptive commutation delay
circuit; these are important in determining the optimum
moment for commutation, depending on the type and
loading of the motor.
• The timing capacitor; this provides the system with its
timing signals.
THE START CAPACITOR (CAP-ST)
This capacitor determines the frequency of the start
oscillator. It is charged and discharged, with a current of
2
µA, from 0.05 to 2.2 V and back to 0.05 V. The time
taken to complete one cycle is given by:
tstart = (2.15 × C) s (with C in µF)
The start oscillator is reset by a commutation pulse and so
is only active when the system is in the start-up mode.
A pulse from the start oscillator will cause the outputs to
change to the next state (torque in the motor). If the
movement of the motor generates enough EMF the
TDA5145TS will run the motor. If the amount of EMF
generated is insufficient, then the motor will move one step
only and will oscillate in its new position. The amplitude of
the oscillation must decrease sufficiently before the arrival
of the next start pulse, to prevent the pulse arriving during
the wrong phase of the oscillation. The oscillation of the
motor is given by:
where:
Kt = torque constant (N.m/A)
I = current (A)
p = number of magnetic pole-pairs
J = inertia J (kg.m2)
Example: J = 72
× 10−6 kg.m2, Kt =25 × 10−3 N.m/A, p = 6
and I = 0.5 A; this gives fosc = 5 Hz.
f
osc
1
2
π
K
t
I
×
p
×
J
-----------------------
-----------------------------------
=
If the damping is high then a start frequency of 2 Hz can be
chosen or t = 500 ms, thus C = 0.5/2 = 0.25
µF
(choose 220 nF).
THE ADAPTIVE COMMUTATION DELAY (CAP-CD AND
CAP-DC)
In this circuit, capacitor CAP-CD is charged during one
commutation period, with an interruption of the charging
current during the diode pulse. During the next
commutation period this capacitor (CAP-CD) is discharged
at twice the charging current. The charging current is
8.1
µA and the discharging current 16.2 µA; the voltage
range is from 0.9 to 2.2 V. The voltage must stay within
this range at the lowest commutation frequency of
interest, fC1:
(C in nF)
If the frequency is lower, then a constant commutation
delay after the zero-crossing is generated by the discharge
from 2.2 to 0.9 V at 16.2
µA; maximum
delay = (0.076
× C) ms (with C in nF)
Example: nominal commutation frequency = 900 Hz and
the lowest usable frequency = 400 Hz; thus:
(choose 18 nF)
The other capacitor, CAP-DC, is used to repeat the same
delay by charging and discharging with 15.5
µA. The same
value can be chosen as for CAP-CD. Figure 8 illustrates
typical voltage waveforms.
C
8.1
10
6
×
f
1.3
×
--------------------------
6231
f
C1
-------------
==
CAP-CD
6231
400
-------------
15.6
==




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