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TDA8043H Datasheet(PDF) 4 Page - NXP Semiconductors |
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TDA8043H Datasheet(HTML) 4 Page - NXP Semiconductors |
4 / 16 page 1998 Feb 13 4 Philips Semiconductors Product specification Satellite Demodulator and Decoder (SDD) TDA8043 QUICK REFERENCE DATA Notes 1. These values are specified for a symbol rate of 27.5 Msymbols/s, a puncturing rate of 3 ⁄4 and a clock frequency of 65 MHz. 2. A range from 3 to 32 Msymbols/s can be achieved with one SAW filter. By using an internal clock divider and reducing the external SAW filter bandwidth, symbol rates down to 0.5 Msymbols/s can be achieved by using a 65 MHz crystal clock. 3. This data was measured in a laboratory environment at a symbol rate of 27.5 Msymbols/s, a clock frequency of 65 MHz, a signal-to-noise ratio of 4.5 dB and including a tuner. PINNING SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT VDDA analog supply voltage 3.0 3.3 3.6 V VDDD digital supply voltage 3.0 3.3 3.6 V IDD(tot) total supply current VDDD = 3.3 V; note 1 − 390 − mA fclk clock frequency −− 65 MHz rs symbol rate note 2 0.5 − 32 Msymbols/s α nyquist roll-off (selectable) − 35 or 50 − % IL implementation loss note 3 − 0.3 − dB S/N signal-to-noise ratio for locking the SDD QPSK mode; note 1 2 −− dB Ptot total power dissipation Tamb =70°C; note 1 − 1285 1650 mW Tstg IC storage temperature −55 − +150 °C Tamb operating ambient temperature 0 − 70 °C Tj operating junction temperature Tamb =70 °C −− 125 °C SYMBOL PIN I/O DESCRIPTION I2 1 I digital I-input bit 2 (ADC bypass); note 1 I3 2 I digital I-input bit 3 (ADC bypass); note 1 VSSD1 3 − digital ground 1 n.c. 4 − not connected n.c. 5 − not connected I4 6 I digital I-input bit 4 (ADC bypass); note 1 I5 7 I digital I-input bit 5 (ADC bypass); note 1 I6 8 I digital I-input bit 6 (ADC bypass: MSB); note 1 Q0 9 I digital Q-input bit 0 (ADC bypass: LSB); note 1 VDDD1 10 − digital supply voltage 1 Q1 11 I digital Q-input bit 1 (ADC bypass); note 1 Q2 12 I digital Q-input bit 2 (ADC bypass); note 1 Q3 13 I digital Q-input bit 3 (ADC bypass); note 1 Q4 14 I digital Q-input bit 4 (ADC bypass); note 1 VSSD2 15 − digital ground 2 Q5 16 I digital Q-input bit 5 (ADC bypass); note 1 Q6 17 I digital Q-input bit 6 (ADC bypass: MSB); note 1 |
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