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STSLVDSP27 Datasheet(PDF) 1 Page - STMicroelectronics

Description  8-bit low voltage serializer with 1.8V high speed dual differential line drivers and embedded DPLL
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Maker  STMICROELECTRONICS [STMicroelectronics]

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June 2007
Rev. 1
8-bit low voltage serializer with 1.8V high speed
dual differential line drivers and embedded DPLL
Sub-low voltage differential signaling:
VOD = 150mV with RT = 100Ω, CL = 10pF
Clock range: 4 to 27 MHz in parallel mode,
BYP = Gnd
Operative frequency serial mode, BYP = VDD;
fOPR = 1 to 208 MHz max
Embedded DPLL requires no external
Output voltage rise and fall times
trVOD = tfVOD = 610ps typ at fOPR = 208MHz
High speed propagation delay times
tpLH~tpHL= 2.1ns typ at VDD = 3.0V; VIO = 1.8V
Operating voltage range:
VDD (OPR) = 2.5V to 3.6V
VIO (OPR) = 1.65V to 1.95V
High impedance on driver outputs
IOZ = 1µA max; EN = Gnd; VO = Gnd or VIO
Low voltage CMOS input threshold
VIL = 0.3 x VDD max; VIH = 0.7 x VDD min
3.6V tolerant on all inputs
Lead-free Flip-Chip package
SMIA CCP1 (MIPI CSI-1) compatible PHY
The STSLVDSP27 is an 8:1 bit serializer with
embedded DPLL. The dual differential line drivers
implement the electrical characteristics of sub-low
voltage differential signaling (subLVDS), bringing
out the serialized data and related synchronous
clock signal. The STSLVDSP27
serializer IC is provided with two power supply
rails, VDD and VIO. The first supply is related to
the logic levels of the input data (DIN0-DIN7,
CLKIN) and Enables (EN, BYP, DV0, DV1) pins.
VIO provides the power supply to the output
current drivers in the device. VIO is always
expected to be a nominal 1.8V. VDD depends on
the application, but will always be equal to or
higher than VIO. In order to minimize static current
consumption, it is possible to shut down the
transmitters when the interface is not used by
setting a power-down (EN) pin. This operation
reduces the maximum current consumption to
20µA, making this device ideal for portable
applications like mobile phones and portable
battery equipment. Simplified functionality can be
reached using the BYP select pin, which disables
the internal DPLL circuitry. When this pin is High
the device can work with serialized signals from
DIN0 input only. A synchronous CLKIN signal
must be provided and it will be put-out using sub-
LVDS level by CLKOUT port; the sub-LVDS data
will be put-out by DOUT port at a maximum
frequency of 208Mhz. This innovative device
provides an optimized high-speed link solution
from different CMOS sensor devices (parallel or
serial outputs) to more advanced graphic
controllers in mobile phone applications. All inputs
and outputs are equipped with protection circuits
against static discharge, providing ESD immunity
from transient excess voltage. The STSLVDSP27
is designed for operation over the commercial
temperature range -40°C to 85°C.
Order code
Part number
Temperature range
-40 to 85 °C
Flip-Chip20 (Tape & Reel)
3000 parts per reel

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