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AZ12010BL Datasheet(PDF) 6 Page - Arizona Microtek, Inc

Part # AZ12010BL
Description  Multiply by 16, 32 Phase-Locked Loop Clock Generator
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Manufacturer  AZM [Arizona Microtek, Inc]
Direct Link  http://azmicrotek.com
Logo AZM - Arizona Microtek, Inc

AZ12010BL Datasheet(HTML) 6 Page - Arizona Microtek, Inc

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AZ12010
November 2006 * REV - 5
www.azmicrotek.com
6
Loop Filter Design
The combination of the phase detector, amplifier, VCO and divider form a second-order phase-locked loop. Proper
selection of the loop components is important to obtain stable, low jitter operation.
The loop bandwidth (or natural frequency,
ωn) and damping factor (ζ) are the two major driving forces that define the
loop’s response to a disturbance. The value of
ζ is typically 0.7 to ensure the fastest step response consistent with no
ringing. However in many oscillator application
ζ may be 3 or higher to provide further phase noise reduction. ωn is
chosen as a compromise between settling time, VCO jitter and reference feedthrough. These values can be computed by
the following equations:
1
1
τ
ω
φ
VCO
n
K
K
N
=
2
2
n
ω
τ
ζ =
1
1
1
C
R
=
τ
1
2
2
C
R
=
τ
=
φ
K
Phase Detector Gain (20.3 radians/V)
=
VCO
K
VCO Gain (radians/sec/volt)
=
N
Frequency Divisor value (32)
The component definitions are shown in the figure below. R3 should be equal to R1 to minimize integrator offsets.
CHARGE
PUMP
INTREF INTSUM
INTOUT
CPREF CPOUT
INTEGRATOR
R2
C1
R1
R3
EXTERNAL
VCSO
CONTROL
VOLTAGE
Figure 1 Charge Pump and Integrator


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