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W90P710CD Datasheet(PDF) 3 Page - Winbond |
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W90P710CD Datasheet(HTML) 3 Page - Winbond |
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3 / 552 page  W90P710CD/W90P710CDG Publication Release Date: September 19, 2006 - 3 - Revision B2 Table of Contents- 1. GENERAL DESCRIPTION ......................................................................................................... 6 2. FEATURES ................................................................................................................................. 6 3. PIN DIAGRAM .......................................................................................................................... 13 4. PIN ASSIGNMENT ................................................................................................................... 14 5. PIN DESCRIPTION................................................................................................................... 20 6. FUNCTIONAL DESCRIPTION ................................................................................................. 33 6.1 ARM7TDMI CPU CORE ............................................................................................... 33 6.2 System Manager........................................................................................................... 34 6.2.1 Overview ......................................................................................................................34 6.2.2 System Memory Map....................................................................................................34 6.2.3 Address Bus Generation ..............................................................................................37 6.2.4 Data Bus Connection with External Memory ................................................................37 6.2.5 Bus Arbitration..............................................................................................................46 6.2.6 Power management .....................................................................................................47 6.2.7 Power-On Setting .........................................................................................................49 6.2.8 System Manager Control Registers Map......................................................................50 6.3 External Bus Interface .................................................................................................. 64 6.3.1 EBI Overview................................................................................................................64 6.3.2 SDRAM Controller ........................................................................................................64 6.3.3 EBI Control Registers Map ...........................................................................................68 6.4 Cache Controller........................................................................................................... 86 6.4.1 On-Chip RAM ...............................................................................................................86 6.4.2 Non-Cacheable Area ....................................................................................................86 6.4.3 Instruction Cache..........................................................................................................87 6.4.4 Data Cache ..................................................................................................................89 6.4.5 Write Buffer ..................................................................................................................91 6.4.6 Cache Control Registers Map.......................................................................................91 6.5 Ethernet MAC Controller............................................................................................... 97 6.5.1 EMC Functional Description .........................................................................................98 6.5.2 EMC Register Mapping ..............................................................................................108 6.6 GDMA Controller ........................................................................................................ 161 6.6.1 GDMA Functional Description ....................................................................................161 6.6.2 GDMA Register Map ..................................................................................................162 6.7 USB Host Controller ................................................................................................... 171 6.7.1 USB Host Functional Description ...............................................................................171 6.7.2 USB Host Controller Registers Map ...........................................................................172 6.7.3 HCCA .........................................................................................................................194 6.7.4 Endpoint Descriptor ....................................................................................................194 6.7.5 Transfer Descriptor.....................................................................................................194 6.8 USB Device Controller................................................................................................ 194 |
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