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PIC18F4220 Datasheet(PDF) 11 Page - Microchip Technology |
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PIC18F4220 Datasheet(HTML) 11 Page - Microchip Technology |
11 / 386 page © 2007 Microchip Technology Inc. DS39599F-page 9 PIC18F2220/2320/4220/4320 FIGURE 1-1: PIC18F2220/2320 BLOCK DIAGRAM Instruction Decode & Control PORTA PORTB PORTC RA4/T0CKI/C1OUT RA5/AN4/SS/LVDIN/C2OUT RC0/T1OSO/T1CKI RC1/T1OSI/CCP2(1) RC2/CCP1/P1A RC3/SCK/SCL RC4/SDI/SDA RC5/SDO RC6/TX/CK RC7/RX/DT Addressable CCP1 Synchronous Timer0 Timer1 Timer2 Serial Port RA3/AN3/VREF+ RA2/AN2/VREF-/CVREF RA1/AN1 RA0/AN0 Converter Data Latch Data RAM Address Latch Address<12> 12(2) BSR FSR0 FSR1 FSR2 4 12 4 PCH PCL PCLATH 8 31 Level Stack Program Counter PRODL PRODH 8 x 8 Multiply WREG 8 BIT OP 8 8 ALU<8> 8 Address Latch Program Memory (4 Kbytes) Data Latch 20 21 21 16 8 8 8 inc/dec logic 21 8 Data Bus<8> 8 Instruction 12 3 ROM Latch Timer3 CCP2 Bank0, F PCLATU PCU OSC2/CLKO/RA6(3) USART Master 8 Register Table Latch Table Pointer <2> inc/dec logic RB0/AN12/INT0 RB4/AN11/KBI0 RB1/AN10/INT1 RB2/AN8/INT2 RB3/AN9/CCP2(1) RB5/KBI1/PGM RB6/KBI2/PGC RB7/KBI3/PGD Data EEPROM OSC1/CLKI/RA7(3) Decode 10-bit A/D PORTE RE3(2) Power-up Timer Power-on Reset Watchdog Timer MCLR(2) VDD, VSS Brown-out Reset Precision Reference Voltage Low-Voltage Programming In-Circuit Debugger Oscillator Start-up Timer Internal OSC1(3) OSC2(3) T1OSI T1OSO INT RC Oscillator Fail-Safe Clock Monitor Note 1: Optional multiplexing of CCP2 input/output with RB3 is enabled by selection of the CCPMX2 configuration bit. 2: RE3 is available only when the MCLR Resets are disabled. 3: OSC1, OSC2, CLKI and CLKO are only available in select oscillator modes and when these pins are not being used as digital I/O. Refer to Section 2.0 “Oscillator Configurations” for additional information. 8 Oscillator Block (512 Bytes) (8- or 16-bit) (16-bit) (8-bit) (16-bit) (256 Bytes) |
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