6

4846B–WLAN–04/05

ATR7032 [Preliminary]

10. Application Circuit

Figure 10-1. Application Board Schematic

9.

Power Detector

Test Conditions measured on Atmel’s evaluation board (unless otherwise stated): V

No.

Parameters

Test Conditions

Pin

Symbol

Min.

Typ.

Max.

Unit

Type*

5.0

Detector voltage

range

02

V

A

5.1

Settling time

0.5

µs

C

5.2

Detector accuracy

V

T

∆P

OUT

±0.7

dB

C

*) Type means: A = 100% tested, B = 100% correlation tested, C = Characterized on samples, D = Design parameter

VCTRL

C5

T2

C7

L3

V_PA3

VDET

PA_Out

V_PA1

C1

RF_IN

C2

VCC

L1

C3

T1

IC

GND_RF

15

14

13

10

9

16

ATR7032

8

Interstage

Matching

50

Ω Input

Match

Voltage

Detector

Standby/

Bias

Circuitry

11

12

5

6

7

Interstage

Matching

1

2

3

4

Paddle

GND_RF

V_PA2

C8

L2

C19

C4

T1, T2: Microstrip Line

Microstrip Line

Length/mm

Width/mm

T1

4.3

0.64

T2

5.6

0.64

Metal layer distance to ground:

360 µm

CU metal layer thickness:

35 µm

ε

4.5

(1) Components can be omitted depending on application

IC: internally connected; pin must not be connected to any

other pin or supply chain