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TDA9170 Datasheet(PDF) 5 Page - NXP Semiconductors |
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TDA9170 Datasheet(HTML) 5 Page - NXP Semiconductors |
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5 / 22 page  October 1994 6 Philips Semiconductors Preliminary specification YUV picture improvement processor based on histogram modification TDA9170 ADAPTIVE WHITE-POINT STRETCHING For dominant HM4 and HM5 voltages or large white parts the histogram conversion procedure makes a transfer with large gain in the white parts. However, the amount of light being emitted from the picture is considerably reduced. The white stretcher introduces additional overall gain for increased light production and, as a result, violates the principle of having a full-scale reference. STANDARD DEVIATION For pictures in which segments of the histogram distribution are very dominant, with respect to the others, the non-linear amplification should be reduced to compensate for pictures with a flat histogram distribution. The standard deviation detector measures the spread of the histogram distribution in the segments HM1 to HM5 and modulates the user setting of the non-linear amplifier. Non-linear amplifier The stored segment voltages, relative to their average value and averaged over two fields, determine the individual gain of each segment in such a way that continuity is guaranteed for the complete range. The maximum and minimum gain of each segment is limited. Apart from the adaptive white-point stretching the black and white references are not affected by the non-linear processing. The amount of linearity can be controlled externally at AMPNLA (pin 3) or via the I2C-bus. Variable gamma function As well as the histogram conversion, a variable gamma function can be applied to ensure excellent brightness control. It is intended as an alternative to the DC-offset of the classic brightness user control; it maintains the black and white references. The gamma ranges from 0.5 to 1.5. The gamma can be set externally at VARGAM (pin 2) or via the I2C-bus. Colour compensation Non-linear luminance processing influences the colour reproduction, mainly the colour saturation. Therefore, U and V signals are also processed for saturation compensation. The U and V input signals are clamped during the logic HIGH period of the clamp which is defined by the sandcastle reference and should be DC decoupled with external capacitors. Timing generator The TDA9170 is equipped with a transparent internal timing generator for window purposes. As a timing reference the relevant sandcastle (SC) can be used. The window enables the black measurement and the histogram measurement circuitry. The internal timing generator is basically intended for system invariant operation. The default window handles all existing norms and disables measurement in subtitles or logos. This default window is preset at power-up and can be selected with a logic HIGH level at the default window select DWS (pin 1). If not selected the blanking of the sandcastle will define the window borders. However, using the I2C-bus and setting the WD1 and WD2 control bits (see Table 3), the window format can also be user-programmed. The horizontal window generator synchronizes on the rising edge of the burst key/clamp key of the external sandcastle reference with an adjustable window start and stop delay. The vertical window generator synchronizes on the falling edge of the first burst key/clamp key after a field pulse recognition. I2C-bus specification The I2C-bus is designed for transparent use. At power-up all registers are preset for system invariant and external control. All pins related to the I2C-bus can be left open-circuit when the I2C-bus is in the standby mode. If the sleep mode bit in the control register is set all settings are left to bus control. For the relevant registers and addresses see Tables 2 to 8. |
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