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R5F212ACSNFP Datasheet(PDF) 8 Page - Renesas Technology Corp |
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R5F212ACSNFP Datasheet(HTML) 8 Page - Renesas Technology Corp |
8 / 58 page A - 1 SFR Page Reference ........................................................................................................................... B - 1 1. Overview ......................................................................................................................................... 1 1.1 Features ..................................................................................................................................................... 1 1.1.1 Applications .......................................................................................................................................... 1 1.1.2 Specifications ........................................................................................................................................ 2 1.2 Product List ............................................................................................................................................... 6 1.3 Block Diagram ....................................................................................................................................... 10 1.4 Pin Assignment ........................................................................................................................................ 11 1.5 Pin Functions ........................................................................................................................................... 15 2. Central Processing Unit (CPU) ..................................................................................................... 17 2.1 Data Registers (R0, R1, R2, and R3) ...................................................................................................... 18 2.2 Address Registers (A0 and A1) ............................................................................................................... 18 2.3 Frame Base Register (FB) ....................................................................................................................... 18 2.4 Interrupt Table Register (INTB) .............................................................................................................. 18 2.5 Program Counter (PC) ............................................................................................................................. 18 2.6 User Stack Pointer (USP) and Interrupt Stack Pointer (ISP) .................................................................. 18 2.7 Static Base Register (SB) ........................................................................................................................ 18 2.8 Flag Register (FLG) ................................................................................................................................ 18 2.8.1 Carry Flag (C) ..................................................................................................................................... 18 2.8.2 Debug Flag (D) ................................................................................................................................... 18 2.8.3 Zero Flag (Z) ....................................................................................................................................... 18 2.8.4 Sign Flag (S) ....................................................................................................................................... 18 2.8.5 Register Bank Select Flag (B) ............................................................................................................ 18 2.8.6 Overflow Flag (O) .............................................................................................................................. 18 2.8.7 Interrupt Enable Flag (I) ..................................................................................................................... 19 2.8.8 Stack Pointer Select Flag (U) .............................................................................................................. 19 2.8.9 Processor Interrupt Priority Level (IPL) ............................................................................................. 19 2.8.10 Reserved Bit ........................................................................................................................................ 19 3. Memory ......................................................................................................................................... 20 3.1 R8C/2A Group ........................................................................................................................................ 20 3.2 R8C/2B Group ......................................................................................................................................... 21 4. Special Function Registers (SFRs) ............................................................................................... 22 5. Resets ........................................................................................................................................... 34 5.1 Hardware Reset ....................................................................................................................................... 37 5.1.1 When Power Supply is Stable ............................................................................................................. 37 5.1.2 Power On ............................................................................................................................................ 37 5.2 Power-On Reset Function ....................................................................................................................... 39 5.3 Voltage Monitor 0 Reset ......................................................................................................................... 40 5.4 Voltage Monitor 1 Reset ......................................................................................................................... 40 5.5 Voltage Monitor 2 Reset ......................................................................................................................... 40 5.6 Watchdog Timer Reset ............................................................................................................................ 41 5.7 Software Reset ......................................................................................................................................... 41 Table of Contents |
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