R1Q3A3636/R1Q3A3618/R1Q3A3609

K Truth Table

Operation

K

/R

/W

D or Q

Data in

Input

data

D(A+0)

D(A+1)

D(A+2)

D(A+3)

Write Cycle:

Load address, input write data

on consecutive K and /K rising

edges

↑

H*

7

L*

8

Output

clock

K(t+1)

↑

/K(t+1)

↑

K(t+2)

↑

/K(t+2)

↑

Data out

Output

data

Q(A+0)

Q(A+1)

Q(A+2)

Q(A+3)

Read Cycle:

Load address, output read

data on consecutive C and /C

rising edges

↑

L*

8

×

Output

clock

/C(t+1)

↑

C(t+2)

↑

/C(t+2)

↑

C(t+3)

↑

NOP (No operation)

↑

H

H

D =

× or Q = High-Z

Standby (Clock stopped)

Stopped

×

×

Previous state

Notes: 1. H: high level, L: low level,

×: don’t care, ↑: rising edge.

2. Data inputs are registered at K and /K rising edges. Data outputs are delivered at C and /C rising edges,

except if C and /C are high, then data outputs are delivered at K and /K rising edges.

3. /R and /W must meet setup/hold times around the rising edges (low to high) of K and are registered at the

rising edge of K.

4. This device contains circuitry that will ensure the outputs will be in high-Z during power-up.

5. Refer to state diagram and timing diagrams for clarification.

6. When clocks are stopped, the following cases are recommended; the case of K = low, /K = high, C = low and

/C = high, or the case of K = high, /K = low, C = high and /C = low. This condition is not essential, but permits

most rapid restart by overcoming transmission line charging symmetrically.

7. If this signal was low to initiate the previous cycle, this signal becomes a “don’t care” for this operation;

however, it is strongly recommended that this signal be brought high, as shown in the truth table.

8. This signal was high on previous K clock rising edge. Initiating consecutive READ or WRITE operations on

consecutive K clock rising edges is not permitted. The device will ignore the second request.

Byte Write Truth Table (x36)

Operation

K

/K

/BW0

/BW1

/BW2

/BW3

Write D0 to D35

↑



L

L

L

L



↑

L

L

L

L

Write D0 to D8

↑



L

H

H

H



↑

L

H

H

H

Write D9 to D17

↑



H

L

H

H



↑

H

L

H

H

Write D18 to D26

↑



H

H

L

H



↑

H

H

L

H

Write D27 to D35

↑



H

H

H

L



↑

H

H

H

L

Write nothing

↑



H

H

H

H



↑

H

H

H

H

Notes: 1. H: high level, L: low level,

↑: rising edge.

2. Assumes a WRITE cycle was initiated. /BWx can be altered for any portion of the BURST WRITE operation

provided that the setup and hold requirements are satisfied.

REJ03C0295-0003 Rev.0.03 Jul. 31, 2007

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