Low-Voltage, CMOS Analog

Multiplexers/Switches

_______________________________________________________________________________________

9

X

H

Table 1. Truth Table/Switch Programming

X

X

All switches open

All switches open

All switches open

L

L

X–X0

X–X0,

Y–Y0

X–X0,

Y–Y0,

Z–Z0

L

L

L

H

X–X1

X–X1,

Y–Y1

X–X1,

Y–Y0,

Z–Z0

L

L

H

H

X–X3

X–X3,

Y–Y3

X–X1,

Y–Y1,

Z–Z0

H

L

X–X2

X–X2,

Y–Y2

X–X0,

Y–Y1,

Z–Z0

L

L

L

L

L

H

X–X5

X–X1,

Y–Y1

X–X1,

Y–Y0,

Z–Z1

L

L

X–X4

X–X0,

Y–Y0

X–X0,

Y–Y0,

Z–Z1

H

L

H

L

H

H

X–X7

X–X3,

Y–Y3

X–X1,

Y–Y1,

Z–Z1

H

L

X–X6

X–X2,

Y–Y2

X–X0,

Y–Y1,

Z–Z1

H

L

H

L

X = Don’t care

*C not present on MAX4582.

Note: Input and output pins are identical and interchangeable. Either may be considered an input or output; signals pass equally

well in either direction.

ON SWITCHES

SELECT INPUTS

B

A

MAX4581

MAX4582

MAX4583

C*

ENABLE

INPUT

will conduct. During normal operation, these and other

reverse-biased ESD diodes leak, forming the only cur-

Virtually all the analog leakage current comes from the

ESD diodes. Although the ESD diodes on a given sig-

nal pin are identical and therefore fairly well balanced,

they are reverse biased differently. Each is biased by

their leakages will vary as the signal varies. The differ-

pins constitutes the analog-signal-path leakage current.

All analog leakage current flows between each pin and

one of the supply terminals, not to the other switch ter-

minal. This is why both sides of a given switch can

show leakage currents of either the same or opposite

polarity.

There is no connection between the analog-signal

paths and GND.

translators, and set the input logic limits. The logic-level

nals. This drive signal is the only connection between

the logic supplies and signals and the analog supplies.

The logic-level thresholds are TTL/CMOS compatible