21-Bit Deserializers with Programmable

Spread Spectrum and DC Balance

_______________________________________________________________________________________

3

DC ELECTRICAL CHARACTERISTICS (continued)

PARAMETER

SYMBOL

CONDITIONS

MIN

TYP

MAX

UNITS

6MHz

27

41

8MHz

30

45

DC-balanced

mode (SSG = low)

18MHz

43

61

8MHz

33

47

10MHz

37

52

Non-DC-balanced

mode (SSG = low)

20MHz

52

73

6MHz

32

47

8MHz

38

57

DC-balanced mode

(SSG = high or open)

18MHz

57

81

8MHz

41

58

10MHz

46

65

Worst-Case Supply Current

worst-case pattern,

to 3.6V, Figure 2

(MAX9246)

Non-DC-balanced

mode

(SSG = high or open)

20MHz

66

92

mA

Power-Down Supply Current

PWRDWN = low

50

µA

5V-TOLERANT LOGIC INPUT (PWRDWN)

High-Level Input Voltage

2.0

5.5

V

Low-Level Input Voltage

-0.3

+0.8

V

Input Current

PWRDWN = high or low level

-20

+20

µA

Input Clamp Voltage

-1.5

V

THREE-LEVEL LOGIC INPUTS (DCB, SSG)

High-Level Input Voltage

2.5

0.3

V

Mid-Level Input Current

DCB, SSG open or connected to a driver with

output in high-impedance state (Note 3)

-10

+10

µA

Low-Level Input Voltage

-0.3

+0.8

V

Input Current

DCB, SSG = high or low level,

PWRDWN = high or low

-20

+20

µA

Input Clamp Voltage

-1.5

V

SINGLE-ENDED OUTPUTS (RxOUT_, RxCLKOUT)

- 0.1

RxCLKOUT (Note 4)

- 0.25

- 0.43

High-Level Output Voltage

RxOUT_

MAX9254

- 0.25

V

0.1

RxCLKOUT (Note 4)

0.2

0.26

Low-Level Output Voltage

RxOUT_

MAX9254

0.2

V