Part Name
         Description
M62333P

 8-bit 3ch I2C BUS D/A Converter with Buffer Amplifiers ( 10 Page)


RENESAS
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 6 page
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M62333P/FP, M62338P/FP
REJ03D0865-0300 Rev.3.00 Jun 15, 2007
Page 6 of 9
Timing Chart (Model)
12345678
A
SDA
SCL
D/A
output
SDA
SCL
D/A
output
1234567
1234567
W
A
SDA
SCL
8
A
D/A
output
<Start condition to slave address bit>
<Sub address bit>
<DAC data bit to stop condition>
Start condition
Stop
condition
• Start condition
With SCL at High, SDA line goes from High to Low
• Stop condition
With SCL at High, SDA line goes from Low to High
(Under normal circumstances, SDA is changed when SCL is Low)
• Acknowledge bit
The receiving IC has to pull down SDA line whenever receive slave data.
(The transmitting IC releases the SDA line just then transmit 8-bit data.)
Digital Data Formats
STA
Slave address
W
A
Sub address 2
A
DAC data 2
A
STP
Sub address 1
A
DAC data 1
A
Sub address n
A
DAC data n
A
…………
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