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RD151TS501USE Datasheet(PDF) 1 Page - Renesas Technology Corp |
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RD151TS501USE Datasheet(HTML) 1 Page - Renesas Technology Corp |
1 / 7 page REJ03D0897-0102 Rev.1.02 Apr 25, 2007 Page 1 of 6 RD151TS501US PLL clock generator series REJ03D0897-0102 Rev.1.02 Apr 25, 2007 Description RD151TS501US is phase-locked loop clock generator with high-performance. And RD151TS501US is low-jitters and will enable high density mounting by shrink small-size package (SSOP-8). Features • Input frequency: 27.0 to 36.0 MHz • Output frequency: 54.0 to 72.0 MHz (1 : 2), 67.5 to 72.0 MHz (1 : 2.5) 27.0 to 36.0 MHz (1 : 1), 33.75 to 36.0 MHz (1 : 1.25) (Selectable) Key Specifications • Supply voltages: V DD = 2.7 to 3.6 V • Operating temperature = -10 to 75 °C • Cycle to cycle jitter = ±75 ps typ. • Clock output duty cycle = 50±5% • Stabilization time: 2ms max • Power-down mode is supported • Ordering Information Part Name Package Type Package Code (Previous Package Code) Package Abbreviation Taping Abbreviation (Quantity) RD151TS501USE SSOP-8 pin PVSP0008KA–A (TTP-8DBV) US E (3,000 pcs / Reel) Pin Arrangement (Top view) 8 DIV2 1 7IN 6 SEL 5 PDWN VDD 2 VDD 3 VSS 4 OUT |
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