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RD151TS502USE Datasheet(PDF) 4 Page - Renesas Technology Corp |
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RD151TS502USE Datasheet(HTML) 4 Page - Renesas Technology Corp |
4 / 7 page RD151TS502US REJ03D0898-0100 Rev.1.00 Apr 25, 2007 Page 4 of 6 AC Electrical Characteristics Ta = –10 to 75 °C, V DD = 2.7 to 3.3 V, CL = 15 pF Item Symbol Min Typ Max Unit Test Conditions Notes Operating current IDD — 6 — mA VDD = 3.3 V, PDWN = 1, CL = 0 pF Stand-by current IDDPD — 10 — µA VDD = 3.3 V, PDWN = 0, IN = 0 V Cycle to cycle jitter tCCJ — |75| — ps CL=0pF Figure 1 — 13.5 — SEL = 0, DIV2 = 1 — 16.875 — SEL = 1, DIV2 = 1 — 27.0 — SEL = 0, DIV2 = 0 Output Frequency — 33.75 — MHz SEL = 1, DIV2 = 0 * 1 Figure 2 Frequency accuracy –50 — 50 ppm * 2 Slew Rate tSR — 1.5 — ns VDD = 3.3 V, 0.2VDD to 0.8VDD Clock duty cycle tDT 45 50 55 % Stabilization time tSB — — 2 ms * 3 Notes: Parameters are target of design. Not 100% tested in production. 1. Output Frequency means average value. 2. The accuracy of the output frequency to a set value. 3. Stabilization time is the time required for the integrated circuit to obtain phase lock of its input signal after power up. OUT tcycle n tCC = (tcycle n) – (tcycle n+1) tcycle n+1 Figure 1 Cycle to cycle jitter DIV2 fout fout/2 OUT ff f f f/2 f/2 f/2 f f ... Figure 2 Timing chart |
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