FXP1800-48G datasheet(7/15 Pages) POWER-ONE

Part #	FXP1800-48G

Description	1500 to 5400-Watt Front-End Power Solutions

Download	15 Pages

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Manufacturer	POWER-ONE [Power-One]

Direct Link	http://www.power-one.com

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7 / 15 page

DEC 12, 2006 revised to FEB 22, 2007

Page 7 of 15

www.power-one.com

FNP1500/1800 and FXP1500/1800 Front-Ends

& FNR-3 and FXR-3 Power Shelves Data Sheet

Output Connector Pinning and Signal Specification (12V Models)

Output

Connector

Description

Location

Type

Low level

High level

U max

I max

Overtemperature /

Fan Fail

U1

OC-output, protected by 16 V Zener diode and a

10 Ω resistor in series, referenced to logic GND

< 0.4 V @ 20 mA

Pull up

15 V

20 mA

AC Fail /

Power down warning

U2

OC-output, protected by 16 V Zener diode and a

10 Ω resistor in series, referenced to logic GND

< 0.4 V @ 20 mA

Pull up

15 V

20 mA

Power Supply

Present

U3

Resistor (1 kΩ) connected to logic GND

Open

Pull up

10 V

10 mA

DC Fail /

Output voltage fault

U4

OC-output, protected by 16 V Zener diode and a

10 Ω resistor in series, referenced to logic GND

< 0.4 V @ 20 mA

Pull up

15 V

20 mA

Internal ground

U5

Internal ground (Vo1– line before the output filter).

Do not connect the internal grounds in

systems with several units.

-

ADDR0, I

2C address

bus

T1

DIP switch or wire to internal ground,

Internally pull up to 5V (10 kΩ).

Switch closed

Switch open

5V

-

ADDR1, I

2C address

bus

T2

DIP switch or wire to internal ground,

Internally pull up to 5V (10 kΩ).

Switch closed

Switch open

5V

-

ADDR2, I

2C address

bus

T3

DIP switch or wire to internal ground,

Internally pull up to 5V (10 kΩ).

Switch closed

Switch open

5V

-

ADDR3, I

2C address

bus

T4

DIP switch or wire to internal ground,

Internally pull up to 5V (10 kΩ).

Switch closed

Switch open

5V

-

ADDR4, I

2C address

bus

T5

DIP switch or wire to internal ground,

Internally pull up to 5V (10 kΩ).

Switch closed

Switch open

5V

-

DATA, I

2C data line

S1

I

2C compatible signal

referenced to logic GND

5 V or 3.3 V logic

-

CLOCK, I

2C clock

line

S2

I

2C compatible signal

referenced to logic GND

5 V or 3.3 V logic

-

Vo2 + output

S3

Auxiliary power pin, insulated from main output

-

Vo2 – output

S4

Auxiliary ground pin, insulated from main output

-

Logic ground

S5

Internally connected over 10 Ω to Auxiliary GND.

Wire separately form Auxiliary - and main output

GND to minimize noise on signals and I

2C.

Leave open if not used.

-

Output inhibit

R1

PS active when pulled low

(DC-DC stage off when left open)

Referenced to logic GND

< 0.8 V

> 2.0 V

10 V

3.5 mA

V sense +

R2

Open or connected to Vo1+ at the load

(Internally connected to Vo1+ over 100 Ω)

dU < 3 Vpp

30 mA

V sense -

R3

Open or connected to Vo1- at the load

(Internally connected to Vo1- over 100 Ω)

dU < 3 Vpp

30 mA

Output margin

R4

Open or connected over resistor to internal

ground. Do not connect the margin pins in

systems with several units.

-

3 VDC

-

Synch. Startup

R5

Open or connected to synch startup circuit,

referenced to Vo1 - at the output connector

-

12V

3mA

Vo1 + output

P2, P4, P6,

P8, P10, P12

Main output + pins

-

Vo1 – output

P1, P3, P5,

P7, P9, P11

Main output – pins

-

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