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SN74BCT374DBLE Datasheet(PDF) 1 Page - Texas Instruments

Part # SN74BCT374DBLE
Description  OCTAL EDGE-TRIGGERED D-TYPE LATCHES WITH 3-STATE OUTPUTS
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Manufacturer  TI [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI - Texas Instruments

SN74BCT374DBLE Datasheet(HTML) 1 Page - Texas Instruments

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SN54BCT374, SN74BCT374
OCTAL EDGE-TRIGGERED D-TYPE LATCHES
WITH 3-STATE OUTPUTS
SCBS019C – SEPTEMBER 1988 – REVISED MARCH 2003
1
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
D Operating Voltage Range of 4.5 V to 5.5 V
D State-of-the-Art BiCMOS Design
Significantly Reduces ICCZ
D Full Parallel Access for Loading
D Buffered Control Inputs
D 3-State Outputs Drive Bus Lines or Buffer
Memory Address Registers
D ESD Protection Exceeds JESD 22
– 2000-V Human-Body Model (A114-A)
SN54BCT374 ...FK PACKAGE
(TOP VIEW)
SN54BCT374 ...J OR W PACKAGE
SN74BCT374 ... DW, N, OR NS PACKAGE
(TOP VIEW)
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
OE
1Q
1D
2D
2Q
3Q
3D
4D
4Q
GND
VCC
8Q
8D
7D
7Q
6Q
6D
5D
5Q
CLK
3
2
1 20 19
910 11 12 13
4
5
6
7
8
18
17
16
15
14
8D
7D
7Q
6Q
6D
2D
2Q
3Q
3D
4D
description/ordering information
These 8-bit flip-flops feature 3-state outputs designed specifically for driving highly capacitive or relatively
low-impedance loads. They are particularly suitable for implementing buffer registers, I/O ports, bidirectional
bus drivers, and working registers.
The eight flip-flops of the ’BCT374 devices are edge-triggered D-type flip-flops. On the positive transition of the
clock (CLK) input, the Q outputs are set to the logic levels that were set up at the data (D) inputs.
A buffered output-enable (OE) input can be used to place the eight outputs in either a normal logic state (high
or low) or a high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines
significantly. The high-impedance state and the increased drive provide the capability to drive bus lines without
need for interface or pullup components. The output-enable (OE) input does not affect internal operations of
the flip-flop. Old data can be retained or new data can be entered while the outputs are in the high-impedance
state.
ORDERING INFORMATION
TA
PACKAGE†
ORDERABLE
PART NUMBER
TOP-SIDE
MARKING
PDIP – N
Tube
SN74BCT374N
SN74BCT374N
0
°Cto70°C
SOIC
DW
Tube
SN74BCT374DW
BCT374
0
°C to 70°C
SOIC – DW
Tape and reel
SN74BCT374DWR
BCT374
SOP – NS
Tape and reel
SN74BCT374NSR
BCT374
CDIP – J
Tube
SNJ54BCT374J
SNJ54BCT374J
–55
°C to 125°C
CFP – W
Tube
SNJ54BCT374W
SNJ54BCT374W
LCCC – FK
Tube
SNJ54BCT374FK
SNJ54BCT374FK
† Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are
available at www.ti.com/sc/package.
Copyright
 2003, Texas Instruments Incorporated
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
On products compliant to MIL-PRF-38535, all parameters are tested
unless otherwise noted. On all other products, production
processing does not necessarily include testing of all parameters.


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