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PIC12F609 Datasheet(PDF) 7 Page - Microchip Technology |
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PIC12F609 Datasheet(HTML) 7 Page - Microchip Technology |
7 / 168 page © 2006 Microchip Technology Inc. Preliminary DS41302A-page 5 PIC12F609/615/12HV609/615 1.0 DEVICE OVERVIEW The PIC12F609/615/12HV609/615 devices are covered by this data sheet. They are available in 8-pin PDIP, SOIC, TSSOP and DFN packages. Block Diagrams and pinout descriptions of the devices are as follows: • PIC12F609/HV609 (Figure 1-1, Table 1-1) • PIC12F615/HV615 (Figure 1-2, Table 1-2) FIGURE 1-1: PIC12F609/HV609 BLOCK DIAGRAM Flash Program Memory 13 Data Bus 8 14 Program Bus Instruction Reg Program Counter RAM File Registers Direct Addr 7 RAM Addr 9 Addr MUX Indirect Addr FSR Reg STATUS Reg MUX ALU W Reg Instruction Decode & Control Timing Generation OSC1/CLKIN OSC2/CLKOUT GPIO 8 8 8 3 8-Level Stack 64 Bytes 1K X 14 (13-Bit) Power-up Timer Oscillator Start-up Timer Power-on Reset Watchdog Timer MCLR VSS Brown-out Reset Timer0 Timer1 GP0 GP1 GP2 GP3 GP4 GP5 Analog Comparator T0CKI INT T1CKI Configuration Internal Oscillator and Reference T1G VDD Block Comparator Voltage Reference Absolute Voltage Reference Shunt Regulator (PIC12HV609 only) |
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Similar Description - PIC12F609 |
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