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MB82DP02183C-65L Datasheet(PDF) 5 Page - Fujitsu Component Limited. |
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MB82DP02183C-65L Datasheet(HTML) 5 Page - Fujitsu Component Limited. |
5 / 32 page MB82DP02183C-65L 5 ■ FUNCTION TRUTH TABLE Notes : L = VIL, H = VIH, X can be either VIL or VIH, High-Z = High Impedance *1 : Should not be kept this logic condition longer than 1 µs. *2 : Power Down mode can be entered from Standby state and all DQ pins are in High-Z state. Data retention depends on the selection of Power Down Program. Refer to “■ Power Down” for the detail. *3 : Can be either VIL or VIH but must be valid before Read or Write. *4 : OE can be VIL during Write operation if the following conditions are satisfied; (1) Write pulse is initiated by CE1. See “(12) READ/WRITE Timing #1-1 (CE1 Control)” in “■ TIMING DIAGRAMS”. (2) OE stays VIL during Write cycle. Mode CE2 CE1WE OE LB UB A20 to A0 DQ8 to DQ1 DQ16 to DQ9 Standby (Deselect) H H XXXX X High-Z High-Z Output Disable*1 HL H H X X *3 High-Z High-Z Output Disable (No Read) HL H H Valid High-Z High-Z Read (Upper Byte) H L Valid High-Z Output Valid Read (Lower Byte) L H Valid Output Valid High-Z Read (Word) L L Valid Output Valid Output Valid No Write LH*4 H H Valid Invalid Invalid Write (Upper Byte) H L Valid Invalid Input Valid Write (Lower Byte) L H Valid Input Valid Invalid Write (Word) L L Valid Input Valid Input Valid Power Down*2 L XXXXX X High-Z High-Z |
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