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UDA1334ATS Datasheet(PDF) 9 Page - NXP Semiconductors |
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UDA1334ATS Datasheet(HTML) 9 Page - NXP Semiconductors |
9 / 24 page 2000 Jul 31 9 Philips Semiconductors Product specification Low power audio DAC with PLL UDA1334ATS 8.6 Feature settings 8.6.1 DIGITAL INTERFACE FORMAT SELECT The digital audio interface formats (see Fig.5) can be selected via pins SFOR1 and SFOR0 as shown in Table 4. For the digital audio interface holds that the BCK frequency can be maximum 64 times WS frequency. The WS signal must change at the negative edge of the BCK signal for all digital audio formats. Table 4 Data format selection 8.6.2 DE-EMPHASIS CONTROL This function is only available in audio mode. In that case, pin DEEM/CLKOUT can be used to activate the digital de-emphasis for 44.1 kHz as given in Table 5. Table 5 De-emphasis control (audio mode) 8.6.3 MUTE CONTROL The output signal can be soft muted by setting pin MUTE to HIGH as given in Table 6. Table 6 Mute control SFOR1 SFOR0 INPUT FORMAT LOW LOW I2S-bus input LOW HIGH LSB-justified 16 bits input HIGH LOW LSB-justified 20 bits input HIGH HIGH LSB-justified 24 bits input DEEM/CLKOUT FUNCTION LOW de-emphasis off HIGH de-emphasis on MUTE FUNCTION LOW mute off HIGH mute on |
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