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IDTCV125PA Datasheet(PDF) 7 Page - Integrated Device Technology

Part # IDTCV125PA
Description  PROGRAMMABLE FLEXPC CLOCK FOR P4 PROCESSOR
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Manufacturer  IDT [Integrated Device Technology]
Direct Link  http://www.idt.com
Logo IDT - Integrated Device Technology

IDTCV125PA Datasheet(HTML) 7 Page - Integrated Device Technology

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COMMERCIALTEMPERATURERANGE
IDTCV125
PROGRAMMABLEFLEXPCCLOCKFORP4PROCESSOR
7
BYTE 3
Bit
Output(s)Affected
Description / Function
0
1
Type
Power On
0
Reserved
RW
0
1
SRC1
RW
0
2
SRC2
RW
0
3
SRC3
Allow controlled by
Freerunning,not
Stoppedwith
RW
0
4
SRC4
PCI_STOP# assertion
affected by PCI_STOP#
PCI_STOP#
RW
0
5
SRC5
RW
0
6
SRC6
RW
0
7
SRC7
RW
0
BYTE 5
Bit
Output(s)Affected
Description / Function
0
1
Type
Power On
0
CPU0, CPU0#
CPU0 PD drive mode
Driven in power down
Tristateinpowerdown
RW
0
1
CPU1, CPU1#
CPU1 PD drive mode
Driven in power down
Tristateinpowerdown
RW
0
2
CPU2, CPU2#
CPU2 PD drive mode
Driven in power down
Tristateinpowerdown
RW
0
3
SRC[7:1], SRC[7:1]#
SRC PD drive mode
Driven in power down
Tristateinpowerdown
RW
0
4
CPU0, CPU0#
CPU0 CPU_STOP drive mode
Driven in CPU_STOP#
Tristatewhenstopped
RW
0
5
CPU1, CPU1#
CPU1 CPU_STOP drive mode
Driven in CPU_STOP#
Tristatewhenstopped
RW
0
6
CPU2, CPU2#
CPU2 CPU_STOP drive mode
Driven in CPU_STOP#
Tristatewhenstopped
RW
0
7
SRC[7:1], SRC[7:1]#
SRC PCI_STOP drive mode
Driven in PCI_STOP
Tristatewhenstopped
RW
0
BYTE 4
Bit
Output(s)Affected
Description / Function
0
1
Type
Power On
0
CPU0, CPU0#
Allow control of CPU0
Notstopped
Stoppedwith
RW
1
with assertion of CPU_STOP#
by CPU_STOP#
CPU_STOP#
1
CPU1, CPU1#
Allow control of CPU1
Notstopped
Stoppedwith
RW
1
with assertion of CPU_STOP#
by CPU_STOP#
CPU_STOP#
2
CPU2, CPU2#
Allow control of CPU2
Notstopped
Stoppedwith
RW
1
with assertion of CPU_STOP#
by CPU_STOP#
CPU_STOP#
3
PCIF0
Allow controlled by
Notstopped
Stoppedwith
RW
0
4
PCIF1
PCI_STOP# assertion
by PCI_STOP#
PCI_STOP#
RW
0
5
Reserved
RW
0
6
DOT96
DOT96 power down drive mode
Driven in power down
Tristate
RW
0
7
Reserved
RW
0


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