Table 1

Format of programmed data

Table 2

Bit allocation (note 1)

Notes

1. FT = first; LT = last; sPON = software power-up for principal synthesizer (1 = ON); sAON = software power-up for auxiliary synthesizer (1 = ON).

2. The test register should not be programmed with any other value except all zeros for normal operation.

Table 3

Out-of-lock select

LAST IN

PROGRAMMING REGISTER BIT USAGE

FIRST IN

p21

p20

p19

p18

p17

p16

../..

p2

p1

ADD0

ADD1

ADD2

ADD3

DATA0

DATA1

../..

DATA15

DATA16

LATCH ADDRESS

LSB

DATA COEFFICIENT

MSB

FT

REGISTER BIT ALLOCATION

LT

p1

p2

p3

p4

p5

p6

p7

p8

p9 p10

p11

p12

p13

p14

p15

p16

p17

p18

p19

p20

p21

dt16

dt15

dt14

dt13

dt12

DATA FIELD

dt4

dt3

dt2

dt1

dt0

ADDRESS

0000

X

X

X

X

OLP

OLA

CR1

CR0

X

X

sPON

sAON

X

X

X

X

X

0001

PM16

PRINCIPAL MAIN DIVIDER COEFFICIENT

PM0

0100

X

X

X

X

X

X

PR10

PRINCIPAL REFERENCE DIVIDER COEFFICIENT

PR0

0101

X

X

X

AM13

AUXILIARY MAIN DIVIDER COEFFICIENT

AM0

0110

X

X

X

X

X

X

AR10

AUXILIARY REFERENCE DIVIDER COEFFICIENT

AR0

0111

X

X

X

X

X

X

X

X

X

0

DA6

7-BIT DAC

DA0

1000

OLP

OLA

OUT-OF-LOCK ON PIN 20

0

0

output disabled

0

1

auxiliary phase error

1

0

principal phase error

1

1

both auxiliary and principal