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PM3351 Datasheet(PDF) 11 Page - PMC-Sierra, Inc |
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PM3351 Datasheet(HTML) 11 Page - PMC-Sierra, Inc |
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11 / 268 page  PM3351 ELAN 1X100 DATA SHEET PMC-970113 ISSUE 3 SINGLE PORT FAST ETHERNET SWITCH PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE 5 RMON statistics at wire rates on all ports. The PM3351 chip contains all the required elements of a high-performance Ethernet switch: an MII interface for connection to physical-layer transceivers, MAC-layer processing logic, buffer FIFOs, a high-speed DMA engine for fast frame transfers, a local memory interface for up to 4 Mbytes of external buffer memory, a compatible PCI bus master and slave unit for modular expansion, and a switch processing unit that implements the switching and bridging functions. The only additional components required for each 100 Mbit/s switch port are an MII compliant transceiver (supports 100BaseTX/FX, 100BaseT4,100BaseT2, and any future 802.3-compliant 100Mbit MII PHYs), passive line interface devices, a bank of external memory and a system clock. The amount of external memory may range up to 4 Mbytes, depending on the amount of frame buffering required and the number of MAC addresses to be supported, and may be implemented using standard asynchronous SRAM devices with 15 nsec access times. Switch configuration information is provided to the PM3351 using a single EPROM or EEPROM; only one EPROM is required in a multiple PM3351/PM3350 system. The ELAN 1x100 device is implemented in a high-density, low-voltage CMOS technology for low cost and high performance. It is available in a 208-pin Quad Flat Pack, and is ideally suited for compact, low-cost desktop, workgroup and departmental Ethernet switching applications. DEVICE DATA Introduction The ELAN 1x100 (PM3351) offers a complete system-level solution, integrating all required elements (except frame/address memory and transceiver logic) in a single high-density VLSI chip. It is a true single-chip switch; all the required functions, including management, RMON-level statistics collection, spanning tree support and self-configuration, are performed by the ELAN 1x100 without need for external CPUs or logic. In addition, the functions required for expandability are also integrated into the device. The ELAN 1x100 is built around a RISC CPU based switching processor core which is closely coupled with a multi-channel DMA controller, MAC-layer interface logic, FIFOs, a PCI-based expansion port and a flexible memory controller. Switch Processor An on-chip Switch Processor is primarily responsible for performing the Ethernet / IEEE 802.3 frame routing functions, and can switch packets arriving simultaneously from the single100BaseT port and the expansion port at full wire rates using address tables that it creates and maintains in external local memory. Store-and-forward switching is |
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