Preliminary Datasheet

Commercial Temperatue Range

6

July 16, 2007

OPERATION

K

KR

W

D(A+0)

D(A+1)

C

C

Q(A+0)

Q(A+1)

Stopped

X

X

X

X

X

Stopped

Previous state

Clock stopped

Stopped

X

X

X

Stopped

Previous state Clock stopped

HH

X

X

X

High - Z

No operation

XX

X

High - Z

No operation

XX

F

X

X

High - Z

No operation

FX

X

High - Z

No operation

XX

X

F

X

High - Z

No operation

XF

X

High - Z

No operation

LX

T

T

X

Read

XX

X

XL

X

X

XWrite

TT

XWrite

6725 tbl 03

NOTES:

1. x = "Don’t Care", H = Logic High, L = Logic Low,

represents rising edge.

3. "A" represents address location latched by the device when operation was initiated. A+0, A+1 represents the internal

address sequence in the burst.

4. "t" represents the cycle at which a read/write operation is started. t+1 and t+2 are the first and second clock cycles

respectively following clock cycle t.

K

Mode

Input Input

Input

Input

H

H

Write function disabled all bytes

H

H

Write function disabled all bytes

L

H

Write data inputs to Byte 0 Only

L

H

Write data inputs to Byte 0 Only

H

L

Write data inputs to Byte 1 Only

H

L

Write data inputs to Byte 1 Only

L

L

Write data inputs to all Bytes

L

L

Write data inputs to all Bytes

6725 tbl03a

NOTES:

Addresses for Writes are qualified on rising edge of K.

basic device functionality.