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P4C1298-25CC Datasheet(PDF) 4 Page - Pyramid Semiconductor Corporation |
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P4C1298-25CC Datasheet(HTML) 4 Page - Pyramid Semiconductor Corporation |
4 / 11 page P4C1298/L Page 4 of 11 Document # SRAM135 REV OR AC CHARACTERISTICS—READ CYCLE (V CC = 5V ± 10%, All Temperature Ranges) (2) TIMING WAVEFORM OF READ CYCLE NO. 2 (ADDRESS CONTROLLED)(5,6) Sym. t RC t AA t AC t OH t LZ t HZ t PU t PD Parameter Read Cycle Time Address Access Time Chip Enable Access Time Output Hold from Address Change Chip Enable to Output in Low Z Chip Disable to Output in High Z Chip Enable to Power Up Time Chip Disable to Power Down Time -15 Min 15 3 3 0 Max 15 15 8 15 -20 Min 20 3 3 0 Max 20 20 10 20 -25 Min 25 3 3 0 Max 25 25 15 25 -35 Min 35 3 3 0 Max 35 35 15 35 Unit ns ns ns ns ns ns ns ns -45 Min 45 3 3 0 Max 45 45 20 45 t OE Output Enable Low to Data Valid ns TIMING WAVEFORM OF READ CYCLE NO. 1 ( OE OE OE OE OE CONTROLLED)(5) t OLZ t OHZ Output Enable Low to Low Z Output Enable High to High Z 810 15 25 30 ns ns 000 0 0 9 9 15 20 20 |
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