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P4C1298-25PM Datasheet(PDF) 5 Page - Pyramid Semiconductor Corporation |
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P4C1298-25PM Datasheet(HTML) 5 Page - Pyramid Semiconductor Corporation |
5 / 11 page P4C1298/L Page 5 of 11 Document # SRAM135 REV OR Notes: 5. CE is LOW and WE is HIGH for READ cycle. 6. WE is HIGH, and address must be valid prior to or coincident with CE transition LOW. 7. Transition is measured ±200mV from steady state voltage prior to change with specified loading in Figure 1. This parameter is sampled and not 100% tested. 8. Read Cycle Time is measured from the last valid address to the first transitioning address. TIMING WAVEFORM OF READ CYCLE NO. 3 ( CE CE CE CE CE CONTROLLED)(5,6) |
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