P4C187-10DM datasheet(4/12 Pages) PYRAMID

Part #	P4C187-10DM

Description	ULTRA HIGH SPEED 64K x 1 STATIC CMOS RAMS

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Manufacturer	PYRAMID [Pyramid Semiconductor Corporation]

Direct Link	http://www.pyramidsemiconductor.com

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4 / 12 page

P4C187/187L

Page 4 of 12

Document # SRAM111 REV B

Notes:

5. CE is LOW and WE is HIGH for READ cycle.

6. WE is HIGH, and address must be valid prior to or coincident with CE

transition LOW.

7. Transition is measured ±200mV from steady state voltage prior to

change with specified loading in Figure 1. This parameter is sampled

and not 100% tested.

8. Read Cycle Time is measured from the last valid address to the first

transitioning address.

TIMING WAVEFORM OF READ CYCLE NO. 2(6)

TIMING WAVEFORM OF READ CYCLE NO. 1(5)

AC CHARACTERISTICS—READ CYCLE

(V

CC = 5V ± 10%, All Temperature Ranges)

(2)

MinMax MinMax MinMax MinMax MinMax MinMax MinMax MinMax MinMax MinMax

tRC

Read Cycle Time

10

12

15

20

25

35

45

55

70

85

tAA

Address Access Time

10

12

15

20

25

35

45

55

70

85

tAC

Chip Enable Access Time

10

12

15

20

25

35

45

65

70

85

tOH

Output Hold from Address Change

2222222

222

tLZ

Chip Enable to Output in Low Z

2222222

222

tHZ

Chip Disable to Output in High Z

5

6

8

10

12

17

20

25

30

35

tPU

Chip Enable to Power Up Time

0000000

000

tPD

Chip Disable to Power Down Time

10

12

15

20

25

35

45

55

70

85

Parameter

Symbol

-10

-12

-45

-55

-70

-85

-15

-20

-25

-35

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