INDUSTRIALTEMPERATURERANGE

IDT74FCT543AT/CT/DT

FASTCMOSOCTALLATCHEDTRANSCEIVER

1

JUNE 2006

INDUSTRIAL TEMPERATURE RANGE

The IDT logo is a registered trademark of Integrated Device Technology, Inc.

© 2006 Integrated Device Technology, Inc.

DSC-5489/6

FEATURES:

• A, C, and D grades

• Low input and output leakage

≤≤≤≤≤1µA (max.)

• CMOS power levels

• True TTL input and output compatibility:

• Meets or exceeds JEDEC standard 18 specifications

• Power off disable outputs permit "live insertion"

• Available in SOIC and QSOP packages

FUNCTIONAL BLOCK DIAGRAM

IDT74FCT543AT/CT/DT

FAST CMOS

OCTAL LATCHED

TRANSCEIVER

DESCRIPTION:

The FCT543T is a non-inverting octal transceiver built using an advanced

dual metal CMOS technology. This device contains two sets of eight D-type

latches with separate input and output controls for each set. For data flow

from A to B, for example, the A-to-B Enable (

CEAB)inputmustbelowinorder

Function Table. With

CEAB low, a low signal on the A-to-B Latch Enable

(

LEAB) input makes the A-to-B latches transparent; a subsequent low-to-

high transition of the

LEAB signal puts the A latches in the storage mode and

their outputs no longer change with the A inputs. With

CEAB andOEAB both

low, the 3-state B output buffers are active and reflect the data present at the

output of the A latches. Control of data from B to A is similar, but uses the

CEBA, LEBA and OEBA inputs.

Q

OEBA

CEBA

LEB A

OEA B

CEA B

LEAB

DETAIL A x 7

D

LE

Q

D

LE

DETAIL A