COMMERCIAL AND INDUSTRIAL

TEMPERATURE RANGES

IDT72T36135M 2.5V 18M-BIT TeraSync









 36-BIT FIFO

524,288 x 36

10

MAY 29, 2006

NOTES:

1. All AC timings apply to both Standard IDT mode and First Word Fall Through mode.

2. Pulse widths less than minimum values are not allowed.

3. Values guaranteed by design, not currently tested.

4. Industrial temperature range product for 6ns speed grade is available as a standard device. All other speed grades are available by special order.

Commercial

Com’l & Ind’l

IDT72T36135ML5

IDT72T36135ML6

Symbol

Parameter

Min.

Max.

Min.

Max.

Unit

Clock Cycle Frequency (Synchronous)

—

200

—

166

MHz

Data Access Time

0.6

3.6

0.6

3.8

ns

Clock Cycle Time

5

—

6

—

ns

Clock High Time

2.5

—

3.0

—

ns

Clock Low Time

2.5

—

3.0

—

ns

Data Setup Time

1.5

—

2.0

—

ns

Data Hold Time

0.5

—

0.5

—

ns

Enable Setup Time

1.5

—

2.0

—

ns

Enable Hold Time

0.5

—

0.5

—

ns

Load Setup Time

1.5

—

2.0

—

ns

Load Hold Time

0.5

—

0.5

—

ns

WCS setup time

1.5

—

2.0

—

ns

WCS hold time

0.5

—

0.5

—

ns

Clock Cycle Frequency (SCLK)

—

10

—

10

MHz

Serial Clock Cycle

100

—

100

—

ns

Serial Clock High

45

—

45

—

ns

Serial Clock Low

45

—

45

—

ns

Serial Data In Setup

15

—

15

—

ns

Serial Data In Hold

5

—

5

—

ns

Serial Enable Setup

5

—

5

—

ns

Serial Enable Hold

5

—

5

—

ns

10

—

10

—

ns

Reset Setup Time

15

—

15

—

ns

HSTL Reset Setup Time

4

—

4

—

µs

Reset Recovery Time

10

—

10

—

ns

Reset to Flag and Output Time

—

15

—

15

ns

Write Clock to

FF[1:2] or IR[1:2]

—

3.6

—

3.7

ns

Read Clock to

EF[1:2] or OR[1:2]

—

3.6

—

3.7

ns

Write Clock to Synchronous

PAF[1:2]

—

3.6

—

3.7

ns

Read Clock to Synchronous

PAE[1:2]

—

3.6

—

3.7

ns

—

3.6

—

3.7

ns

—

3.6

—

3.7

ns

Skew time between RCLK and WCLK for

EF[1:2] and FF[1:2]

—4

—

5

ns

Skew time between RCLK and WCLK for

PAE[1:2] and PAF[1:2]

—5

—

6

ns