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IDT7203L12TDG Datasheet(PDF) 1 Page - Integrated Device Technology |
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IDT7203L12TDG Datasheet(HTML) 1 Page - Integrated Device Technology |
1 / 14 page 1 DSC-2661/15 © 2006 Integrated Device Technology, Inc. All rights reserved. Product subject to change without notice. APRIL 2006 CMOS ASYNCHRONOUS FIFO 2,048 x 9, 4,096 x 9 8,192 x 9, 16,384 x 9 32,768 x 9 and 65,536 x 9 IDT7203 IDT7204 IDT7205 IDT7206 IDT7207 IDT7208 IDT and the IDT logo are trademarks of Integrated Device Technology, Inc. COMMERCIAL,MILITARYANDINDUSTRIALTEMPERATURERANGES FEATURES: ••••• First-In/First-Out Dual-Port memory ••••• 2,048 x 9 organization (IDT7203) ••••• 4,096 x 9 organization (IDT7204) ••••• 8,192 x 9 organization (IDT7205) ••••• 16,384 x 9 organization (IDT7206) ••••• 32,768 x 9 organization (IDT7207) ••••• 65,636 x 9 organization (IDT7208) ••••• High-speed: 12ns access time ••••• Low power consumption — Active: 660mW (max.) — Power-down: 44mW (max.) ••••• Asynchronous and simultaneous read and write ••••• Fully expandable in both word depth and width ••••• Pin and functionally compatible with IDT720X family ••••• Status Flags: Empty, Half-Full, Full ••••• Retransmit capability ••••• High-performance CMOS technology ••••• Military product compliant to MIL-STD-883, Class B ••••• Standard Military Drawing for #5962-88669 (IDT7203), 5962-89567 (IDT7203), and 5962-89568 (IDT7204) are listed on this function DESCRIPTION: The IDT7203/7204/7205/7206/7207/7208 are dual-port memory buffers with internal pointers that load and empty data on a first-in/first-out basis. The device uses Full and Empty flags to prevent data overflow and underflow and expansionlogictoallowforunlimitedexpansioncapabilityinbothwordsizeand depth. DataistoggledinandoutofthedevicethroughtheuseoftheWrite( W)and Read ( R) pins. The device's 9-bit width provides a bit for a control or parity at the user’s option. It also features a Retransmit ( RT)capabilitythatallowsthereadpointer to be reset to its initial position when RT is pulsed LOW. A Half-Full Flag is available in the single device and width expansion modes. These FIFOs are fabricated using IDT’s high-speed CMOS technology. They are designed for applications requiring asynchronous and simultaneous read/writes in multiprocessing, rate buffering and other applications. Militarygradeproductismanufacturedincompliancewiththelatestrevision of MIL-STD-883, Class B. FUNCTIONAL BLOCK DIAGRAM • Industrial temperature range (–40 °C to +85°C) is available (plastic packages only) W WRITE CONTROL READ CONTROL R FLAG LOGIC EXPANSION LOGIC XI WRITE POINTER RAM ARRAY 2,048 x 9 4,096 x 9 8,192 x 9 16,384 x 9 32,768 x 9 65,536 x 9 READ POINTER DATA INPUTS RESET LOGIC THREE- STATE BUFFERS DATA OUTPUTS EF FF XO/HF RS FL/RT 0 (D -D8) 0 (Q -Q 8) 2661 drw01 ••••• Green parts available, see ordering information |
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