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P4C164-20PMBLF Datasheet(PDF) 5 Page - Pyramid Semiconductor Corporation

Part # P4C164-20PMBLF
Description  ULTRA HIGH SPEED 8K x 8 STATIC CMOS RAMS
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Manufacturer  PYRAMID [Pyramid Semiconductor Corporation]
Direct Link  http://www.pyramidsemiconductor.com
Logo PYRAMID - Pyramid Semiconductor Corporation

P4C164-20PMBLF Datasheet(HTML) 5 Page - Pyramid Semiconductor Corporation

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P4C164
Page 5 of 16
Document # SRAM115 REV F
TIMINIG WAVERFORM OF READ CYCLE NO. 2 (ADDRESS CONTROLLED)(5,6)
TIMING WAVEFORM OF READ CYCLE NO. 3 (
CE
CE
CE
CE
CE
1, CE2 CONTROLLED)
(5,7,10)
Notes:
9. READ Cycle Time is measured from the last valid address to the first
transitioning address.
10. Transitions caused by a chip enable control have similar delays
irrespective of whether
CE
1 or CE2 causes them.
AC CHARACTERISTICS—WRITE CYCLE
(V
CC = 5V ± 10%, All Temperature Ranges)
(2)
Min Max Min Max Min Max Min Max Min Max Min Max Min Max Min Max Min Max Min Max
tWC
Write Cycle Time
8
10
1215
2025
354570
100
ns
tCW
Chip Enable
Time to End of
Write
6
7
8
12
15
18
25
33
50
70
ns
tAW
Address Valid to
End of Write
7
8
10
12
15
18
25
33
50
70
ns
tAS
Address Set-up
Time
000
00
00
00
0
ns
tWP
Write Pulse
Width
7
8
9
12
15
18
20
25
40
50
ns
tAH
Address Hold
Time
000
00
00
00
0
ns
tDW
Data Valid to
End of Write
6
7
8
9
1113
15203040
ns
tDH
Date Hold Time
000
00
00
00
0
ns
tWZ
Write Enable to
Output in High Z
67
77
8
10
14
18
30
40
ns
tOW
Output Active
from End of
Write
333
33
33
33
3
ns
Symbol
Parameter
-8
-10
-12
-15
-20
-25
Unit
-35
-45
-70
-100


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