6

COMMERCIALTEMPERATURERANGE

WITH BUS MATCHING 2,048 x 36 x 2, 4,096 x 36 x 2 and 8,192 x 36 x 2

Port B

I

SIZEB determines the bus width of Port B. A HIGH on this pin selects byte (9-bit) bus size. A LOW on this pin

Bus Size Select

selects word (18-bit) bus size. SIZEB works with SIZEC and BE to select the bus size and endian arrangement

for ports B and C. The level of SIZEB must be static throughout device operation.

Port C

I

SIZEC determines the bus width of Port C. A HIGH on this pin selects byte (9-bit) bus size. A LOW on this pin

Bus Size Select

selects word (18-bit) bus size. SIZEC works with SIZEB and BE to select the bus size and endian arrangement

for ports B and C. The level of SIZEC must be static throughout device operation.

WENC

Port C Write Enable

I

WENC must be HIGH to enable a LOW-to-HIGH transition of CLKC to write data on Port C.

W/

RA

Port A Write/

I

A HIGH selects a write operation and a LOW selects a read operation on Port A for a LOW-to-HIGH transition of

Read Select

CLKA. The A0-A35 outputs are in the HIGH impedance state when W/

RA is HIGH.

PIN DESCRIPTIONS (CONTINUED)

Symbol

Name

I/O

Description

NOTE: