6.42

9

IDT71P79204 (2Mx8-Bit), 71P79104 (2Mx9-Bit), 71P79804 (1Mx18-Bit) 71P79604 (512Kx36-Bit)

18 Mb DDR II SIO SRAM Burst of 2

Commercial and Industrial Temperature Ranges

Notes:

1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS

may cause permanent damage to the device. This is a stress rating only and

functionaloperationofthedeviceattheseoranyotherconditionsabovethose

indicatedintheoperationalsectionsofthisspecificationisnotimplied.Exposure

to absolute maximum rating conditions for extended periods may affect

reliability.

2. VDDQ must not exceed VDD during normal operation.

Note:

1. Tested at characterization and retested after any design or process change that

may affect these parameters.

Symbol

Parameter

Conditions

Max.

Unit

Input Capacitance

5pF

Clock Input Capacitance

6

pF

Output Capacitance

7

pF

6432 tbl 06

Symbol

Rating

Value

Unit

Respect to GND

–0.5 to +2.9

V

Respect to GND

V

Voltage on Input terminals with

respect to GND

V

Voltage on output and I/O

terminals with respect to GND

Temperature Under Bias

–55 to +125

°C

Storage Temperature

–65 to +150

°C

Continuous Current into Outputs

+ 20

mA

6432 tbl 05

Recommended DC Operating

Conditions

Symbol

Parameter

Min.

Typ.

Max.

Unit

Power Supply Voltage

1.7

1.8

1.9

V

I/O Supply Voltage

1.4

1.5

1.9

V

Ground

0

0

0

V

Input Reference Voltage

-

-V

Ambient

Commercial

0 to +70

o

c

Industrial

-40 to +85

o

c

6432 tbl 04

Notes:

1) All byte write (

BWx) and nibble write (NWx) signals are sampled on

the rising edge of K and again on

K. The data that is present on the data bus\

in the designated byte/nibble will be latched into the input if the corresponding

BWx or NWx is held low. The rising edge of K will sample the first byte/nibble

of the two word burst and the rising edge of

K will sample the second byte

nibble of the two word burst.

2) The availability of the

BWx or NWx on designated devices is described in the

pin description table.

3) The DDRII SIO Burst of two SRAM has data forwarding. A read request that

is initiated on cycle following a write request to the same address will produce

the newly written data in response to the read request.

Signal

Write Byte 0

L

XXXX

X

Write Byte 1

X

L

XXX

X

Write Byte 2

X

X

L

X

X

X

Write Byte 3

X

X

X

L

X

X

Write Nibble 0

X

X

X

X

L

X

Write Nibble 1

X

XXXX

L

6432 tbl 09

Note:

1. During production testing, the case temperature equals the ambient

temperature.