6.42

IDT71342SA/LA

High-Speed 4K x 8 Dual-Port Static RAM with Semaphore

Industrial and Commercial Temperature Ranges

7

NOTES:

1. Write cycle parameters should be adhered to, in order to ensure proper writing.

2.

3. Port "A" may be either left or right port. Port "B" is the opposite from port "A".

NOTES:

1. Timing depends on which signal is asserted last,

OE or CE.

2. Timing depends on which signal is de-asserted first,

OE or CE.

3. R/

5. To access SRAM,

ADDRESS

PREVIOUS DATA VALID

DATA VALID

2721 drw 07

2721 drw 08

CE or SEM

VALID DATA

OE

50%

50%

CURRENT

(5)

(1)

(1)

(4)

(2)

(2)

(4)

2721 drw 09

R/

VALID

MATCH

VALID

MATCH

(1)